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| author | Wade Fife <wade.fife@ettus.com> | 2022-01-25 16:23:23 -0600 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-06-10 13:24:04 -0500 |
| commit | c793fbb42a7a2a7ce26c3eb229cea0943f6741ba (patch) | |
| tree | f6373b18d2b34327679923424d1d09947e526b16 /fpga/usrp3/top/n3xx | |
| parent | cee4c3dd08c785fbbcce6fe4d2f58cc57fca0486 (diff) | |
| download | uhd-c793fbb42a7a2a7ce26c3eb229cea0943f6741ba.tar.gz uhd-c793fbb42a7a2a7ce26c3eb229cea0943f6741ba.tar.bz2 uhd-c793fbb42a7a2a7ce26c3eb229cea0943f6741ba.zip | |
fpga: rfnoc: Remove rfnoc_version from target YAML
This causes the latest RFNoC protocol version to be used by default
and avoids the need to update YAML files every time the RFNoC
protocol version gets bumped.
Diffstat (limited to 'fpga/usrp3/top/n3xx')
| -rw-r--r-- | fpga/usrp3/top/n3xx/n300_bist_image_core.yml | 1 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml | 1 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n310_bist_image_core.yml | 1 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml | 1 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n320_bist_image_core.yml | 1 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml | 1 |
6 files changed, 0 insertions, 6 deletions
diff --git a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml index 34325daeb..372a5608b 100644 --- a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml +++ b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this image device: 'n300' default_target: 'N300_AA' diff --git a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml index 71ac5a403..198413dae 100644 --- a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml +++ b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this image device: 'n300' default_target: 'N300_HG' diff --git a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml index fe9ed9169..8f5b56859 100644 --- a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml +++ b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this block device: 'n310' default_target: 'N310_AA' diff --git a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml index 13fd8cfc0..b38b235f5 100644 --- a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml +++ b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this image device: 'n310' default_target: 'N310_HG' diff --git a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml index 478440219..0a3c94e51 100644 --- a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml +++ b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this block device: 'n320' default_target: 'N320_AA' diff --git a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml index 32af29600..4d748488c 100644 --- a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml +++ b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml @@ -6,7 +6,6 @@ copyright: >- # Copyright information used in file hea license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version -rfnoc_version: '1.0' # RFNoC protocol version chdr_width: 64 # Bit width of the CHDR bus for this image device: 'n320' default_target: 'N320_HG' |