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authorMartin Braun <martin.braun@ettus.com>2020-01-23 16:10:22 -0800
committerMartin Braun <martin.braun@ettus.com>2020-01-28 09:35:36 -0800
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tree39ba24b5b67072d354775272e687796bb511848d /fpga/usrp3/top/n3xx/dboards/rh/db_ifc/PkgClockingRegMap.vhd
parent3075b981503002df3115d5f1d0b97d2619ba30f2 (diff)
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Merge FPGA repository back into UHD repository
The FPGA codebase was removed from the UHD repository in 2014 to reduce the size of the repository. However, over the last half-decade, the split between the repositories has proven more burdensome than it has been helpful. By merging the FPGA code back, it will be possible to create atomic commits that touch both FPGA and UHD codebases. Continuous integration testing is also simplified by merging the repositories, because it was previously difficult to automatically derive the correct UHD branch when testing a feature branch on the FPGA repository. This commit also updates the license files and paths therein. We are therefore merging the repositories again. Future development for FPGA code will happen in the same repository as the UHD host code and MPM code. == Original Codebase and Rebasing == The original FPGA repository will be hosted for the foreseeable future at its original local location: https://github.com/EttusResearch/fpga/ It can be used for bisecting, reference, and a more detailed history. The final commit from said repository to be merged here is 05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as v4.0.0.0-pre-uhd-merge. If you have changes in the FPGA repository that you want to rebase onto the UHD repository, simply run the following commands: - Create a directory to store patches (this should be an empty directory): mkdir ~/patches - Now make sure that your FPGA codebase is based on the same state as the code that was merged: cd src/fpga # Or wherever your FPGA code is stored git rebase v4.0.0.0-pre-uhd-merge Note: The rebase command may look slightly different depending on what exactly you're trying to rebase. - Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge: git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches Note: Make sure that only patches are stored in your output directory. It should otherwise be empty. Make sure that you picked the correct range of commits, and only commits you wanted to rebase were exported as patch files. - Go to the UHD repository and apply the patches: cd src/uhd # Or wherever your UHD repository is stored git am --directory fpga ~/patches/* rm -rf ~/patches # This is for cleanup == Contributors == The following people have contributed mainly to these files (this list is not complete): Co-authored-by: Alex Williams <alex.williams@ni.com> Co-authored-by: Andrej Rode <andrej.rode@ettus.com> Co-authored-by: Ashish Chaudhari <ashish@ettus.com> Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com> Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com> Co-authored-by: Daniel Jepson <daniel.jepson@ni.com> Co-authored-by: Derek Kozel <derek.kozel@ettus.com> Co-authored-by: EJ Kreinar <ej@he360.com> Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Ian Buckley <ian.buckley@gmail.com> Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com> Co-authored-by: Jon Kiser <jon.kiser@ni.com> Co-authored-by: Josh Blum <josh@joshknows.com> Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Matt Ettus <matt@ettus.com> Co-authored-by: Michael West <michael.west@ettus.com> Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com> Co-authored-by: Nick Foster <nick@ettus.com> Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Co-authored-by: Paul David <paul.david@ettus.com> Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com> Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com> Co-authored-by: Sylvain Munaut <tnt@246tNt.com> Co-authored-by: Trung Tran <trung.tran@ettus.com> Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com> Co-authored-by: Wade Fife <wade.fife@ettus.com>
Diffstat (limited to 'fpga/usrp3/top/n3xx/dboards/rh/db_ifc/PkgClockingRegMap.vhd')
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diff --git a/fpga/usrp3/top/n3xx/dboards/rh/db_ifc/PkgClockingRegMap.vhd b/fpga/usrp3/top/n3xx/dboards/rh/db_ifc/PkgClockingRegMap.vhd
new file mode 100644
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+++ b/fpga/usrp3/top/n3xx/dboards/rh/db_ifc/PkgClockingRegMap.vhd
@@ -0,0 +1,107 @@
+-------------------------------------------------------------------------------
+--
+-- File: PkgClockingRegMap.vhd
+-- Author: Autogenerated by XmlParse
+-- Original Project: --
+-- Date: --
+--
+-------------------------------------------------------------------------------
+-- Copyright 2017 Ettus Research, A National Instruments Company
+-- SPDX-License-Identifier: LGPL-3.0
+-------------------------------------------------------------------------------
+--
+-- Purpose:
+-- The constants in this file are autogenerated by XmlParse and should
+-- be used by testbench code to access specific register fields.
+--
+-------------------------------------------------------------------------------
+
+library ieee;
+ use ieee.std_logic_1164.all;
+ use ieee.numeric_std.all;
+
+package PkgClockingRegMap is
+
+--===============================================================================
+-- A numerically ordered list of registers and their VHDL source files
+--===============================================================================
+
+ -- RadioClkMmcm : 0x20 (ClockingRegs.vhd)
+ -- PhaseShiftControl : 0x24 (ClockingRegs.vhd)
+ -- RadioClkEnables : 0x28 (ClockingRegs.vhd)
+ -- MgtRefClkStatus : 0x30 (ClockingRegs.vhd)
+
+--===============================================================================
+-- RegTypes
+--===============================================================================
+
+--===============================================================================
+-- Register Group ClockingRegs
+--===============================================================================
+
+ -- RadioClkMmcm Register (from ClockingRegs.vhd)
+ constant kRadioClkMmcm : integer := 16#20#; -- Register Offset
+ constant kRadioClkMmcmSize: integer := 32; -- register width in bits
+ constant kRadioClkMmcmMask : std_logic_vector(31 downto 0) := X"00000013";
+ constant kRadioClkMmcmResetSetSize : integer := 1; --RadioClkMmcm:RadioClkMmcmResetSet
+ constant kRadioClkMmcmResetSetMsb : integer := 0; --RadioClkMmcm:RadioClkMmcmResetSet
+ constant kRadioClkMmcmResetSet : integer := 0; --RadioClkMmcm:RadioClkMmcmResetSet
+ constant kRadioClkMmcmResetClearSize : integer := 1; --RadioClkMmcm:RadioClkMmcmResetClear
+ constant kRadioClkMmcmResetClearMsb : integer := 1; --RadioClkMmcm:RadioClkMmcmResetClear
+ constant kRadioClkMmcmResetClear : integer := 1; --RadioClkMmcm:RadioClkMmcmResetClear
+ constant kRadioClkMmcmLockedSize : integer := 1; --RadioClkMmcm:RadioClkMmcmLocked
+ constant kRadioClkMmcmLockedMsb : integer := 4; --RadioClkMmcm:RadioClkMmcmLocked
+ constant kRadioClkMmcmLocked : integer := 4; --RadioClkMmcm:RadioClkMmcmLocked
+
+ -- PhaseShiftControl Register (from ClockingRegs.vhd)
+ constant kPhaseShiftControl : integer := 16#24#; -- Register Offset
+ constant kPhaseShiftControlSize: integer := 32; -- register width in bits
+ constant kPhaseShiftControlMask : std_logic_vector(31 downto 0) := X"10010011";
+ constant kPsIncSize : integer := 1; --PhaseShiftControl:PsInc
+ constant kPsIncMsb : integer := 0; --PhaseShiftControl:PsInc
+ constant kPsInc : integer := 0; --PhaseShiftControl:PsInc
+ constant kPsDecSize : integer := 1; --PhaseShiftControl:PsDec
+ constant kPsDecMsb : integer := 4; --PhaseShiftControl:PsDec
+ constant kPsDec : integer := 4; --PhaseShiftControl:PsDec
+ constant kPsEnabledForFdbClkSize : integer := 1; --PhaseShiftControl:PsEnabledForFdbClk
+ constant kPsEnabledForFdbClkMsb : integer := 16; --PhaseShiftControl:PsEnabledForFdbClk
+ constant kPsEnabledForFdbClk : integer := 16; --PhaseShiftControl:PsEnabledForFdbClk
+ constant kPsDoneSize : integer := 1; --PhaseShiftControl:PsDone
+ constant kPsDoneMsb : integer := 28; --PhaseShiftControl:PsDone
+ constant kPsDone : integer := 28; --PhaseShiftControl:PsDone
+
+ -- RadioClkEnables Register (from ClockingRegs.vhd)
+ constant kRadioClkEnables : integer := 16#28#; -- Register Offset
+ constant kRadioClkEnablesSize: integer := 32; -- register width in bits
+ constant kRadioClkEnablesMask : std_logic_vector(31 downto 0) := X"00000111";
+ constant kRadioClk1xEnabledSize : integer := 1; --RadioClkEnables:RadioClk1xEnabled
+ constant kRadioClk1xEnabledMsb : integer := 0; --RadioClkEnables:RadioClk1xEnabled
+ constant kRadioClk1xEnabled : integer := 0; --RadioClkEnables:RadioClk1xEnabled
+ constant kRadioClk2xEnabledSize : integer := 1; --RadioClkEnables:RadioClk2xEnabled
+ constant kRadioClk2xEnabledMsb : integer := 4; --RadioClkEnables:RadioClk2xEnabled
+ constant kRadioClk2xEnabled : integer := 4; --RadioClkEnables:RadioClk2xEnabled
+ constant kRadioClk3xEnabledSize : integer := 1; --RadioClkEnables:RadioClk3xEnabled
+ constant kRadioClk3xEnabledMsb : integer := 8; --RadioClkEnables:RadioClk3xEnabled
+ constant kRadioClk3xEnabled : integer := 8; --RadioClkEnables:RadioClk3xEnabled
+
+ -- MgtRefClkStatus Register (from ClockingRegs.vhd)
+ constant kMgtRefClkStatus : integer := 16#30#; -- Register Offset
+ constant kMgtRefClkStatusSize: integer := 32; -- register width in bits
+ constant kMgtRefClkStatusMask : std_logic_vector(31 downto 0) := X"00000001";
+ constant kJesdRefClkPresentSize : integer := 1; --MgtRefClkStatus:JesdRefClkPresent
+ constant kJesdRefClkPresentMsb : integer := 0; --MgtRefClkStatus:JesdRefClkPresent
+ constant kJesdRefClkPresent : integer := 0; --MgtRefClkStatus:JesdRefClkPresent
+
+end package;
+
+package body PkgClockingRegMap is
+
+ -- function kRadioClkMmcmRec not implemented because PkgXReg in this project does not support XReg2_t.
+
+ -- function kPhaseShiftControlRec not implemented because PkgXReg in this project does not support XReg2_t.
+
+ -- function kRadioClkEnablesRec not implemented because PkgXReg in this project does not support XReg2_t.
+
+ -- function kMgtRefClkStatusRec not implemented because PkgXReg in this project does not support XReg2_t.
+
+end package body;