diff options
| author | Wade Fife <wade.fife@ettus.com> | 2021-12-09 14:30:30 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2022-03-29 14:45:04 -0500 |
| commit | 6f038dc2f69b38e715206b2e700fdd3a1bbc638e (patch) | |
| tree | 8fb2499be9e9a7acffd5add92a59389f3e6bb2b9 /fpga/usrp3/top/e320/e320_core.v | |
| parent | 61337817eb9c617db37fdbb16fb5f598e15a29a7 (diff) | |
| download | uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.tar.gz uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.tar.bz2 uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.zip | |
fpga: Use PROTOVER and CHDR_W from RFNoC image builder
This updates all RFNoC devices so that they get the RFNoC protocol
version and CHDR width in the same way, from the output generated by
the RFNoC image builder.
Diffstat (limited to 'fpga/usrp3/top/e320/e320_core.v')
| -rw-r--r-- | fpga/usrp3/top/e320/e320_core.v | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/fpga/usrp3/top/e320/e320_core.v b/fpga/usrp3/top/e320/e320_core.v index a63bdda91..a49f28bf1 100644 --- a/fpga/usrp3/top/e320/e320_core.v +++ b/fpga/usrp3/top/e320/e320_core.v @@ -25,7 +25,7 @@ module e320_core #( parameter NUM_CHANNELS_PER_DBOARD = 2, parameter FP_GPIO_WIDTH = 8, // Front panel GPIO width parameter DB_GPIO_WIDTH = 16, // Daughterboard GPIO width - parameter CHDR_WIDTH = 16'd64 , + parameter CHDR_W = 64, parameter RFNOC_PROTOVER = {8'd1, 8'd0} )( // Clocks and resets @@ -468,7 +468,7 @@ module e320_core #( cp_glob_resp_data <= { 16'd0, device_id }; REG_RFNOC_INFO: - cp_glob_resp_data <= {CHDR_WIDTH[15:0], RFNOC_PROTOVER[15:0]}; + cp_glob_resp_data <= {CHDR_W[15:0], RFNOC_PROTOVER[15:0]}; REG_COMPAT_NUM: cp_glob_resp_data <= {COMPAT_MAJOR[15:0], COMPAT_MINOR[15:0]}; @@ -1028,7 +1028,8 @@ module e320_core #( end rfnoc_image_core #( - .PROTOVER(RFNOC_PROTOVER) + .CHDR_W (CHDR_W), + .PROTOVER (RFNOC_PROTOVER) ) rfnoc_sandbox_i ( .chdr_aclk (bus_clk ), .ctrl_aclk (clk40 ), |