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author | michael-west <michael.west@ettus.com> | 2020-09-04 15:32:12 -0700 |
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committer | michael-west <michael.west@ettus.com> | 2020-09-04 15:45:51 -0700 |
commit | 413ebee61254fd0b9ab0cd11b475b8a849579cd8 (patch) | |
tree | d1807d3e38eb57cba61a71bb2661b422616cee71 /fpga/usrp3/top/e320/Makefile.e320.inc | |
parent | be53058a47c6b2925103d44595f06fd6fb85e4be (diff) | |
download | uhd-413ebee61254fd0b9ab0cd11b475b8a849579cd8.tar.gz uhd-413ebee61254fd0b9ab0cd11b475b8a849579cd8.tar.bz2 uhd-413ebee61254fd0b9ab0cd11b475b8a849579cd8.zip |
E320: Revert addition of Replay block
The DMA FIFO is needed for DDR3 BIST, so it is being restored for now.
Signed-off-by: michael-west <michael.west@ettus.com>
Diffstat (limited to 'fpga/usrp3/top/e320/Makefile.e320.inc')
-rw-r--r-- | fpga/usrp3/top/e320/Makefile.e320.inc | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/fpga/usrp3/top/e320/Makefile.e320.inc b/fpga/usrp3/top/e320/Makefile.e320.inc index c78c40d4a..b8544f3cd 100644 --- a/fpga/usrp3/top/e320/Makefile.e320.inc +++ b/fpga/usrp3/top/e320/Makefile.e320.inc @@ -34,13 +34,12 @@ include $(LIB_DIR)/dsp/Makefile.srcs include $(LIB_DIR)/io_cap_gen/Makefile.srcs include $(LIB_DIR)/rfnoc/Makefile.srcs # For sake of convenience, we include the Makefile.srcs for DRAM FIFO, DDC, and -# DUC, Replay, and of course the radio. Any other block needs to use the +# DUC, and of course the radio. Any other block needs to use the # RFNOC_OOT_MAKEFILE_SRCS variable (see below). include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_axi_ram_fifo/Makefile.srcs include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_radio/Makefile.srcs include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_ddc/Makefile.srcs include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_duc/Makefile.srcs -include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_replay/Makefile.srcs # If out-of-tree modules want to be compiled into this image, then they need to # pass in the RFNOC_OOT_MAKEFILE_SRCS as a list of Makefile.srcs files. # Those files need to amend the RFNOC_OOT_SRCS variable with a list of actual @@ -118,7 +117,6 @@ $(RFNOC_FRAMEWORK_SRCS) \ $(RFNOC_BLOCK_AXI_RAM_FIFO_SRCS) \ $(RFNOC_BLOCK_DUC_SRCS) $(RFNOC_BLOCK_DDC_SRCS) \ $(RFNOC_BLOCK_RADIO_SRCS) \ -$(RFNOC_BLOCK_REPLAY_SRCS) \ $(abspath $(MB_XDC)) EDGE_TBL_DEF="RFNOC_EDGE_TBL_FILE=$(call RESOLVE_PATH,$(EDGE_FILE))" |