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| author | Wade Fife <wade.fife@ettus.com> | 2021-12-09 14:30:30 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2022-03-29 14:45:04 -0500 |
| commit | 6f038dc2f69b38e715206b2e700fdd3a1bbc638e (patch) | |
| tree | 8fb2499be9e9a7acffd5add92a59389f3e6bb2b9 /fpga/usrp3/top/e31x/e31x.v | |
| parent | 61337817eb9c617db37fdbb16fb5f598e15a29a7 (diff) | |
| download | uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.tar.gz uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.tar.bz2 uhd-6f038dc2f69b38e715206b2e700fdd3a1bbc638e.zip | |
fpga: Use PROTOVER and CHDR_W from RFNoC image builder
This updates all RFNoC devices so that they get the RFNoC protocol
version and CHDR width in the same way, from the output generated by
the RFNoC image builder.
Diffstat (limited to 'fpga/usrp3/top/e31x/e31x.v')
| -rw-r--r-- | fpga/usrp3/top/e31x/e31x.v | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/fpga/usrp3/top/e31x/e31x.v b/fpga/usrp3/top/e31x/e31x.v index 57c1346ff..9ca3db62e 100644 --- a/fpga/usrp3/top/e31x/e31x.v +++ b/fpga/usrp3/top/e31x/e31x.v @@ -136,6 +136,22 @@ module e31x ( inout [5:0] PL_GPIO ); + // Include the RFNoC image core header file + `ifdef RFNOC_IMAGE_CORE_HDR + `include `"`RFNOC_IMAGE_CORE_HDR`" + `else + ERROR_RFNOC_IMAGE_CORE_HDR_not_defined(); + `define CHDR_WIDTH 64 + `define RFNOC_PROTOVER { 8'd1, 8'd0 } + `endif + localparam CHDR_W = `CHDR_WIDTH; + localparam RFNOC_PROTOVER = `RFNOC_PROTOVER; + + // This USRP currently only supports 64-bit CHDR width + if (CHDR_W != 64) begin : gen_chdr_w_error + CHDR_W_must_be_64_for_this_USRP(); + end + // Constants localparam REG_AWIDTH = 14; // log2(0x4000) localparam REG_DWIDTH = 32; @@ -846,7 +862,9 @@ module e31x ( .NUM_DBOARDS(NUM_DBOARDS), .NUM_CHANNELS_PER_DBOARD(NUM_CHANNELS_PER_RADIO), .FP_GPIO_WIDTH(FP_GPIO_WIDTH), - .DB_GPIO_WIDTH(DB_GPIO_WIDTH) + .DB_GPIO_WIDTH(DB_GPIO_WIDTH), + .CHDR_W(CHDR_W), + .RFNOC_PROTOVER(RFNOC_PROTOVER) ) e31x_core_inst ( //Clocks and resets |