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| author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
| commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
| tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp3/top/b200/planahead/planahead.data/sim_1 | |
| parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
| download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip | |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp3/top/b200/planahead/planahead.data/sim_1')
| -rw-r--r-- | fpga/usrp3/top/b200/planahead/planahead.data/sim_1/fileset.xml | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/fpga/usrp3/top/b200/planahead/planahead.data/sim_1/fileset.xml b/fpga/usrp3/top/b200/planahead/planahead.data/sim_1/fileset.xml deleted file mode 100644 index 65babe32f..000000000 --- a/fpga/usrp3/top/b200/planahead/planahead.data/sim_1/fileset.xml +++ /dev/null @@ -1,10 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?> -<DARoots Version="1" Minor="26"> - <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1"> - <Config> - <Option Name="DesignMode" Val="RTL"/> - <Option Name="TopAutoSet" Val="TRUE"/> - <Option Name="SrcSet" Val="sources_1"/> - </Config> - </FileSet> -</DARoots> |