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| author | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
|---|---|---|
| committer | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
| commit | 04292f9b109479b639add31f83fd240a6387f488 (patch) | |
| tree | 4b8723a4ae63626029704f901ee0083bb23bc1e9 /fpga/usrp3/top/b200/Makefile.b200.inc | |
| parent | 09915aa57bc88099cbcbbe925946ae65bc0ad8f0 (diff) | |
| parent | ff8a1252f3a51369abe0a165d963b781089ec66c (diff) | |
| download | uhd-04292f9b109479b639add31f83fd240a6387f488.tar.gz uhd-04292f9b109479b639add31f83fd240a6387f488.tar.bz2 uhd-04292f9b109479b639add31f83fd240a6387f488.zip | |
Merge branch 'master' into mwest/b200_docs
Diffstat (limited to 'fpga/usrp3/top/b200/Makefile.b200.inc')
| -rw-r--r-- | fpga/usrp3/top/b200/Makefile.b200.inc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/fpga/usrp3/top/b200/Makefile.b200.inc b/fpga/usrp3/top/b200/Makefile.b200.inc index da7561cab..288a29fe3 100644 --- a/fpga/usrp3/top/b200/Makefile.b200.inc +++ b/fpga/usrp3/top/b200/Makefile.b200.inc @@ -22,6 +22,7 @@ include ../../lib/packet_proc/Makefile.srcs include ../../lib/timing/Makefile.srcs include ../../lib/vita/Makefile.srcs include ../../lib/wishbone/Makefile.srcs +include ../../lib/axi/Makefile.srcs B200_COREGEN_SRCS = \ coregen/b200_clk_gen.v \ @@ -76,7 +77,8 @@ $(GPIF2_SRCS) $(PACKET_PROC_SRCS) \ $(WISHBONE_SRCS) \ $(TIMING_SRCS) \ $(DSP_SRCS) \ -$(VITA_SRCS) +$(VITA_SRCS) \ +$(AXI_SRCS) ################################################## # Process Properties |