fpga: tools: Add ability to patch IP during generation

This adds the ability to call BUILD_VIVADO_IP, as before, followed by
REBUILD_VIVADO_IP_WITH_PATCH to patch a file generated by the IP and
then rebuild the IP with the patched file.

2 files changed, 87 insertions, 0 deletions

diff --git a/fpga/usrp3/tools/make/viv_ip_builder.mak b/fpga/usrp3/tools/make/viv_ip_builder.mak
index e2ca66cd5..9d231ebfa 100644
--- a/fpga/usrp3/tools/make/viv_ip_builder.mak
+++ b/fpga/usrp3/tools/make/viv_ip_builder.mak
@@ -43,6 +43,39 @@ BUILD_VIVADO_IP = \
 	exit $$VIV_ERR
 
 # -------------------------------------------------------------------
+# Usage: REBUILD_VIVADO_IP_WITH_PATCH
+# Args: $1 = IP_NAME (IP name)
+#       $2 = ARCH (zynq, kintex7, etc)
+#       $3 = PART_ID (<device>/<package>/<speedgrade>[/<tempgrade>[/<silicon revision>]])
+#       $4 = IP_SRC_DIR (Absolute path to the top level ip src dir)
+#       $5 = IP_BUILD_DIR (Not used here, but kept for consistency with BUILD_VIVADO_IP)
+#       $6 = GENERATE_EXAMPLE (0 or 1)
+#       $7 = PATCHED_FILE (Patched version of the file from previous IP build)
+#       $8 = FILE_TO_PATCH (Path to file that needs to be patched)
+# Prereqs: 
+# - TOOLS_DIR must be defined globally
+# - This assumes BUILD_VIVADO_IP has been run once
+# -------------------------------------------------------------------
+REBUILD_VIVADO_IP_WITH_PATCH = \
+	@ \
+	echo "========================================================"; \
+	echo "BUILDER: Building Patched IP $(1)"; \
+	echo "========================================================"; \
+	export XCI_FILE=$(call RESOLVE_PATH,$(5)/$(1)/$(1).xci); \
+	export PART_NAME=`python $(TOOLS_DIR)/scripts/viv_gen_part_id.py $(2)/$(3)`; \
+	export GEN_EXAMPLE=$(6); \
+	export SYNTH_IP=$(SYNTH_IP); \
+	export PATCHED_FILE=$(7); \
+	export FILE_TO_PATCH=$(8); \
+	$(TOOLS_DIR)/scripts/shared-ip-loc-manage.sh --path=$(5)/$(1) reserve; \
+	cd $(5); \
+	echo "BUILDER: Building Patched IP..."; \
+	export VIV_ERR=0; \
+	$(TOOLS_DIR)/scripts/launch_vivado.py -mode batch -source $(call RESOLVE_PATH,$(TOOLS_DIR)/scripts/viv_generate_patch_ip.tcl) -log $(1).log -nojournal || export VIV_ERR=$$?; \
+	$(TOOLS_DIR)/scripts/shared-ip-loc-manage.sh --path=$(5)/$(1) release; \
+	exit $$VIV_ERR
+
+# -------------------------------------------------------------------
 # Usage: BUILD_VIVADO_BD
 # Args: $1 = BD_NAME (IP name)
 #       $2 = ARCH (zynq, kintex7, etc)
diff --git a/fpga/usrp3/tools/scripts/viv_generate_patch_ip.tcl b/fpga/usrp3/tools/scripts/viv_generate_patch_ip.tcl
new file mode 100644
index 000000000..ada31af6a
--- /dev/null
+++ b/fpga/usrp3/tools/scripts/viv_generate_patch_ip.tcl
@@ -0,0 +1,54 @@
+#
+# Copyright 2020 Ettus Research, a National Instrument Brand
+#
+
+# This script generates the indicated IP, patches it, then builds it with the
+# patch.
+
+# ---------------------------------------
+# Gather all external parameters
+# ---------------------------------------
+set xci_file         $::env(XCI_FILE)               ;# Absolute path to XCI file from src dir
+set part_name        $::env(PART_NAME)              ;# Full Xilinx part name
+set gen_example_proj $::env(GEN_EXAMPLE)            ;# Generate an example project
+set synth_ip         $::env(SYNTH_IP)               ;# Synthesize generated IP
+set ip_name [file rootname [file tail $xci_file]]   ;# Extract IP name
+set patched_file     $::env(PATCHED_FILE)           ;# Path to patched version of the file
+set file_to_patch    $::env(FILE_TO_PATCH)          ;# Path to file that needs to be patched
+
+# Delete any previous output cookie file
+file delete -force "$xci_file.out"
+
+# ---------------------------------------
+# Vivado Commands
+# ---------------------------------------
+create_project -part $part_name -in_memory -ip
+set_property target_simulator XSim [current_project]
+add_files -norecurse -force $xci_file
+reset_target all [get_files $xci_file]
+puts "BUILDER: Generating IP Target..."
+generate_target all [get_files $xci_file]
+puts "BUILDER: Patching IP..."
+puts "Patched file is:"
+puts "$patched_file"
+puts "File to patch is:"
+puts "$file_to_patch"
+file copy -force "$patched_file" "$file_to_patch"
+if [string match $synth_ip "1"] {
+    puts "BUILDER: Synthesizing IP Target..."
+    synth_ip [get_ips $ip_name]
+}
+if [string match $gen_example_proj "1"] {
+    puts "BUILDER: Generating Example Design..."
+    open_example_project -force -dir . [get_ips $ip_name]
+}
+close_project
+
+if { [get_msg_config -count -severity ERROR] == 0 } {
+    # Write output cookie file
+    set outfile [open "$xci_file.out" w]
+    puts $outfile "This file was auto-generated by viv_generate_ip.tcl and signifies that IP generation is done."
+    close $outfile
+} else {
+    exit 1
+}