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authorWade Fife <wade.fife@ettus.com>2022-01-10 14:40:43 -0600
committerAaron Rossetto <aaron.rossetto@ni.com>2022-01-13 14:33:59 -0600
commit51384afc2c5d4db9e2e45d97382edce8c8039b10 (patch)
tree20c57c1a088df8c24873823e8a49fb6fedd9d515 /fpga/usrp3/tools
parent0caed55298060735bc7f79fafda07c83d3cc2ee6 (diff)
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fpga: hls: Add version to generated HLS IP
This change causes HLS IP to be exported with a version of 1.0.0 instead of a date code. Due to a bug in Vivado, date codes after 0x7FFFFFFF (anything in 2022 or beyond) cause an error. Setting an explicit revision avoids this issue. See Xilinx AR 76960 for details.
Diffstat (limited to 'fpga/usrp3/tools')
-rw-r--r--fpga/usrp3/tools/scripts/viv_generate_hls_ip.tcl4
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga/usrp3/tools/scripts/viv_generate_hls_ip.tcl b/fpga/usrp3/tools/scripts/viv_generate_hls_ip.tcl
index 7f4e76b4a..6121203fa 100644
--- a/fpga/usrp3/tools/scripts/viv_generate_hls_ip.tcl
+++ b/fpga/usrp3/tools/scripts/viv_generate_hls_ip.tcl
@@ -36,6 +36,6 @@ foreach src_file $hls_ip_srcs {
}
}
csynth_design
-export_design -format ip_catalog
-
+puts "BUILDER: Setting IP export version to 1.0.0 to workaround Y2K22 bug (AR 76960)"
+export_design -format ip_catalog -version 1.0.0
exit