fpga: tools: Add Quartus build utilities

3 files changed, 163 insertions, 0 deletions

diff --git a/fpga/usrp3/tools/make/quartus_design_builder.mak b/fpga/usrp3/tools/make/quartus_design_builder.mak
new file mode 100644
index 000000000..f0ffa88f5
--- /dev/null
+++ b/fpga/usrp3/tools/make/quartus_design_builder.mak
@@ -0,0 +1,64 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+include $(BASE_DIR)/../tools/make/quartus_preamble.mak
+SIMULATION = 0
+
+# -------------------------------------------------------------------
+# Usage: BUILD_QUARTUS_DESIGN
+# Args: $1 = PROJECT_NAME
+#       $2 = ARCH (max10, etc)
+#       $3 = PART_ID (10M04SAU169I7G, etc)
+#       $4 = PROJECT_DIR (Absolute path to the top level project dir)
+#       $5 = BUILD_DIR (Absolute path to the top level build dir)
+#       $6 = (optional) POST_STA_TCL (Absolute path to the tcl script to be run by quartus_sta)
+#       $7 = (optional) PARTITION_MERGE_ON (Request partition merge in the build process)
+# Prereqs:
+# - TOOLS_DIR must be defined globally
+# - BUILD_DIR must be defined globally
+# - DESIGN_SRCS must be defined and should contain all source files
+# - VERILOG_DEFS must be defined and should contain all PP defines
+# -------------------------------------------------------------------
+# Reports parsing performed:
+#   grep for unconstrained path warning (332102) in the *.sta.rpt
+#   grep for timing closure critical warning (332148) in the *.sta.rpt
+#   expect no warnings in the *.sta.rpt
+#   expect no critical warning except "review power analyzer report file" (16562)
+BUILD_QUARTUS_DESIGN = \
+	@ \
+	echo "========================================================"; \
+	echo "BUILDER: Building $(1) for $(3)"; \
+	echo "========================================================"; \
+	echo "BUILDER: Staging Quartus sources in build directory..."; \
+	cp -rf $(4)/quartus/* $(5)/;\
+	cd $(5); \
+	echo "BUILDER: Retargeting IP to part $(2)/$(3)..."; \
+	quartus_sh --set DEVICE=$(3) $(1); \
+	echo "BUILDER: Synthesizing design..."; \
+	quartus_map $(1) $(foreach VERILOG_DEF,$(VERILOG_DEFS),--verilog_macro=$(VERILOG_DEF)); \
+	if [ $(7) -eq 1 ]; then \
+		echo "BUILDER: Partition merge..."; \
+		quartus_cdb $(1) --merge=on --incremental_compilation_import; \
+	fi; \
+	echo "BUILDER: Implementating design..."; \
+	quartus_fit $(1);\
+	echo "BUILDER: Timing analysis..."; \
+	quartus_sta $(1); \
+	echo "BUILDER: Parsing reports..."; \
+	grep "332102" output_files/$(1).sta.rpt; \
+		if [ $$? -eq 0 ]; then exit 1; fi; \
+	grep "332148" output_files/$(1).sta.rpt; \
+		if [ $$? -eq 0 ]; then exit 1; fi; \
+	grep -iw "warning" output_files/$(1).sta.rpt; \
+		if [ $$? -eq 0 ]; then exit 1; fi; \
+	grep -i "critical warning" output_files/* | grep -v 16562; \
+		if [ $$? -eq 0 ]; then exit 1; fi; \
+	if [ ! -z $(6) ]; then \
+		echo "BUILDER: Running additional STA TCL script..."; \
+		quartus_sta -t $(6);\
+	fi; \
+	echo "BUILDER: Generating bitfile..."; \
+	quartus_asm $(1);
diff --git a/fpga/usrp3/tools/make/quartus_ip_builder.mak b/fpga/usrp3/tools/make/quartus_ip_builder.mak
new file mode 100644
index 000000000..fe9fab489
--- /dev/null
+++ b/fpga/usrp3/tools/make/quartus_ip_builder.mak
@@ -0,0 +1,32 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+QSYS_PATH=$(subst \,/,$(QSYS_ROOTDIR))
+
+# -------------------------------------------------------------------
+# Usage: BUILD_QUARTUS_IP
+# Args: $1 = IP_NAME (IP name)
+#       $2 = ARCH (max10, etc)
+#       $3 = PART_ID (10M04SAU169I7G, etc)
+#       $4 = IP_SRC_DIR (Absolute path to the top level ip src dir)
+#       $5 = IP_BUILD_DIR (Absolute path to the top level ip build dir)
+# Prereqs:
+# - TOOLS_DIR must be defined globally
+# -------------------------------------------------------------------
+BUILD_QUARTUS_IP = \
+	@ \
+	echo "========================================================"; \
+	echo "BUILDER: Building IP $(1)"; \
+	echo "========================================================"; \
+	echo "BUILDER: Staging IP in build directory..."; \
+	rm -rf $(5)/$(1); \
+	mkdir -p $(5)/$(1); \
+	$(TOOLS_DIR)/scripts/shared-ip-loc-manage.sh --path=$(5)/$(1) reserve; \
+	cp -rf $(4)/$(1)/* $(5)/$(1); \
+	echo "BUILDER: Retargeting IP to part $(2)/$(3)..."; \
+	$(QSYS_PATH)/qsys-generate $(call RESOLVE_PATH,$(5)/$(1)/$(1).qsys) --part=$(3) --simulation=VERILOG; \
+	$(TOOLS_DIR)/scripts/shared-ip-loc-manage.sh --path=$(5)/$(1) release; \
+	echo $?
diff --git a/fpga/usrp3/tools/make/quartus_preamble.mak b/fpga/usrp3/tools/make/quartus_preamble.mak
new file mode 100644
index 000000000..2fe20e555
--- /dev/null
+++ b/fpga/usrp3/tools/make/quartus_preamble.mak
@@ -0,0 +1,67 @@
+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+# -------------------------------------------------------------------
+# Environment Setup
+# -------------------------------------------------------------------
+ifeq ($(VIV_PLATFORM),Cygwin)
+RESOLVE_PATH = $(if $(1),$(subst \,/,$(shell cygpath -aw $(1))))
+RESOLVE_PATHS = "$(if $(1),$(foreach path,$(1),$(subst \,/,$(shell cygpath -aw $(abspath $(path))))))"
+else
+RESOLVE_PATH = $(1)
+RESOLVE_PATHS = "$(1)"
+endif
+
+# -------------------------------------------------------------------
+# Project Setup
+# -------------------------------------------------------------------
+# Requirement: BASE_DIR must be defined
+
+TOOLS_DIR  = $(BASE_DIR)/../tools
+LIB_DIR    = $(BASE_DIR)/../lib
+
+O ?= .
+
+ifdef NAME
+BUILD_DIR = $(abspath $(O)/build-$(NAME))
+else
+BUILD_DIR = $(abspath $(O)/build)
+endif
+
+IP_BUILD_DIR = $(abspath ./build-ip/$(subst /,,$(PART_ID)))
+
+# -------------------------------------------------------------------
+# Git Hash Retrieval
+# -------------------------------------------------------------------
+GIT_HASH = $(shell $(TOOLS_DIR)/scripts/git-hash.sh)
+GIT_HASH_VERILOG_DEF = "GIT_HASH=32'h$(GIT_HASH)"
+
+# -------------------------------------------------------------------
+# Toolchain dependency target
+# -------------------------------------------------------------------
+.check_tool:
+	@echo "BUILDER: Checking tools..."
+	@echo -n "* "; bash --version | grep bash || (echo "ERROR: Bash not found in environment. Please install it"; exit 1;)
+	@echo -n "* "; python3 --version || (echo "ERROR: Python not found in environment. Please install it"; exit 1;)
+	@echo -n "* "; quartus_sh --version 2>&1 | grep Quartus || (echo "ERROR: Quartus not found in environment. Please run setupenv.sh"; exit 1;)
+
+# -------------------------------------------------------------------
+# Intermediate build dirs
+# -------------------------------------------------------------------
+.build_dirs:
+	@mkdir -p $(BUILD_DIR)
+	@mkdir -p $(IP_BUILD_DIR)
+
+.prereqs: .check_tool .build_dirs
+
+.PHONY: .check_tool .build_dirs .prereqs
+
+# -------------------------------------------------------------------
+# Validate prerequisites
+# -------------------------------------------------------------------
+ifndef PART_ID
+	$(error PART_ID was empty or not set)
+endif