diff options
| author | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
|---|---|---|
| committer | michael-west <michael.west@ettus.com> | 2014-03-25 15:59:03 -0700 |
| commit | 04292f9b109479b639add31f83fd240a6387f488 (patch) | |
| tree | 4b8723a4ae63626029704f901ee0083bb23bc1e9 /fpga/usrp3/lib/zynq_fifo/Makefile.srcs | |
| parent | 09915aa57bc88099cbcbbe925946ae65bc0ad8f0 (diff) | |
| parent | ff8a1252f3a51369abe0a165d963b781089ec66c (diff) | |
| download | uhd-04292f9b109479b639add31f83fd240a6387f488.tar.gz uhd-04292f9b109479b639add31f83fd240a6387f488.tar.bz2 uhd-04292f9b109479b639add31f83fd240a6387f488.zip | |
Merge branch 'master' into mwest/b200_docs
Diffstat (limited to 'fpga/usrp3/lib/zynq_fifo/Makefile.srcs')
| -rw-r--r-- | fpga/usrp3/lib/zynq_fifo/Makefile.srcs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/zynq_fifo/Makefile.srcs b/fpga/usrp3/lib/zynq_fifo/Makefile.srcs new file mode 100644 index 000000000..0a63d1627 --- /dev/null +++ b/fpga/usrp3/lib/zynq_fifo/Makefile.srcs @@ -0,0 +1,15 @@ +# +# Copyright 2012 Ettus Research LLC +# + +################################################## +# ZYNQ FIFO interface sources +################################################## +ZYNQ_FIFO_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/zynq_fifo/, \ +zf_arbiter.v \ +zf_stream_to_host.v \ +zf_host_to_stream.v \ +zf_slave_readback.v \ +zf_slave_settings.v \ +zynq_fifo_top.v \ +)) |