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| author | Humberto Jimenez <humberto.jimenez@ni.com> | 2018-12-13 16:35:50 -0600 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-06-03 10:22:04 -0500 |
| commit | fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d (patch) | |
| tree | 9bcfbccbb420d71a2b878313c1a2d8feadcbc224 /fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml | |
| parent | 747746f3909555a942282dd522a97ad4aaec3975 (diff) | |
| download | uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.tar.gz uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.tar.bz2 uhd-fba23eb42c91ca1bc1108b5ba50c1b567cb9b59d.zip | |
fpga: tools: Add support for RFSoC
This commit includes the following changes to the tools:
- Change part definition in XCI and BD editors for the RFSoC family
- Resolve part name in Vivado IP management utilities with
viv_gen_part_id.py
Diffstat (limited to 'fpga/usrp3/lib/vivado_ipi/axi_bitq/component.xml')
0 files changed, 0 insertions, 0 deletions