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| author | Wade Fife <wade.fife@ettus.com> | 2020-08-20 12:22:13 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-08-23 13:52:26 -0500 |
| commit | db0d2dddcc5d8e39e2b7843a326ad9392bbb4c3f (patch) | |
| tree | adc384fb0faf7be5bb949fe769400c6305c4eb8a /fpga/usrp3/lib/sim/rfnoc/window/build_window_tb | |
| parent | 1239c35ce632792cbae9a467d19e2f39cc0b5b4e (diff) | |
| download | uhd-db0d2dddcc5d8e39e2b7843a326ad9392bbb4c3f.tar.gz uhd-db0d2dddcc5d8e39e2b7843a326ad9392bbb4c3f.tar.bz2 uhd-db0d2dddcc5d8e39e2b7843a326ad9392bbb4c3f.zip | |
fpga: rfnoc: Remove deprecated files
Diffstat (limited to 'fpga/usrp3/lib/sim/rfnoc/window/build_window_tb')
| -rwxr-xr-x | fpga/usrp3/lib/sim/rfnoc/window/build_window_tb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/fpga/usrp3/lib/sim/rfnoc/window/build_window_tb b/fpga/usrp3/lib/sim/rfnoc/window/build_window_tb deleted file mode 100755 index 1af299fd4..000000000 --- a/fpga/usrp3/lib/sim/rfnoc/window/build_window_tb +++ /dev/null @@ -1 +0,0 @@ -iverilog -o window_tb window_tb.v -y ../coregen -y ../../../usrp2/models -y . -y ../control/ -y ../fifo/ -y /opt/Xilinx/14.6/ISE_DS/ISE/verilog/src/unisims/ -y ../packet_proc/ -y ../timing/ -y ../vita/ |