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| author | Wade Fife <wade.fife@ettus.com> | 2021-06-09 10:09:22 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-06-17 08:16:59 -0500 |
| commit | 4dc2b7010c0f3e41758b8192636ef7672caae0f7 (patch) | |
| tree | ddd120f8750bc08b4c4ff935a3b03888f5e89a89 /fpga/usrp3/lib/sim/axi/axis_width_conv/Makefile | |
| parent | 9ff2dd8e41e6f34d99cba28640ab00290906cae6 (diff) | |
| download | uhd-4dc2b7010c0f3e41758b8192636ef7672caae0f7.tar.gz uhd-4dc2b7010c0f3e41758b8192636ef7672caae0f7.tar.bz2 uhd-4dc2b7010c0f3e41758b8192636ef7672caae0f7.zip | |
fpga: tools: Add ip target to simulation makefiles
Allow building of just the IP by running "make ip" in simulation
directories.
Diffstat (limited to 'fpga/usrp3/lib/sim/axi/axis_width_conv/Makefile')
0 files changed, 0 insertions, 0 deletions