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| author | Andrew Moch <Andrew.Moch@ni.com> | 2020-03-19 19:55:53 +0100 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-03-23 08:23:51 -0500 |
| commit | 5c7237fb407cfccaee205980d97e40ce10768c2a (patch) | |
| tree | dbdba3dcefff2d3cdeab27fa371c203b3398aa81 /fpga/usrp3/lib/rfnoc/crossbar | |
| parent | b721621237c0cd4150e9310cf443d4fb3a735388 (diff) | |
| download | uhd-5c7237fb407cfccaee205980d97e40ce10768c2a.tar.gz uhd-5c7237fb407cfccaee205980d97e40ce10768c2a.tar.bz2 uhd-5c7237fb407cfccaee205980d97e40ce10768c2a.zip | |
fpga: Fix errors found by linting with vsim
Diffstat (limited to 'fpga/usrp3/lib/rfnoc/crossbar')
| -rw-r--r-- | fpga/usrp3/lib/rfnoc/crossbar/crossbar_tb/chdr_traffic_source_sim.sv | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/rfnoc/crossbar/crossbar_tb/chdr_traffic_source_sim.sv b/fpga/usrp3/lib/rfnoc/crossbar/crossbar_tb/chdr_traffic_source_sim.sv index 8c3d974c9..e6cb7c5d9 100644 --- a/fpga/usrp3/lib/rfnoc/crossbar/crossbar_tb/chdr_traffic_source_sim.sv +++ b/fpga/usrp3/lib/rfnoc/crossbar/crossbar_tb/chdr_traffic_source_sim.sv @@ -72,10 +72,12 @@ module chdr_traffic_source_sim #( input [7:0] traffic_patt; input [15:0] last_sid; + logic [31:0] rnum; + if (traffic_patt == TRAFFIC_PATT_UNIFORM) begin gen_dst_sid = $urandom_range('d0, NUM_NODES-'d1); end else if (traffic_patt == TRAFFIC_PATT_UNIFORM_OTHERS) begin - logic [31:0] rnum = $urandom_range('d0, NUM_NODES-'d2); + rnum = $urandom_range('d0, NUM_NODES-'d2); if (rnum < NODE_ID) gen_dst_sid = rnum[15:0]; else @@ -99,7 +101,9 @@ module chdr_traffic_source_sim #( // Generation loop. Push to m_chdr infinitely fast initial begin: gen_blk // Generate infinitely - $srandom(NODE_ID + NUM_NODES); + std::process p; + p = process::self(); + p.srandom(NODE_ID + NUM_NODES); m_chdr.reset(); while (1) begin // A generation session begins on the posedge of start_stb |