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| author | Wade Fife <wade.fife@ettus.com> | 2021-09-01 15:38:39 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-09-08 08:36:05 -0500 |
| commit | 8c0c30642d47d17e2fa9d168b462d7ace18cc3d4 (patch) | |
| tree | 865a34309282eab97962b8900831806f4cb631f5 /fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile | |
| parent | 66267f515802ff3f965fd44e1f0d3097ada7484f (diff) | |
| download | uhd-8c0c30642d47d17e2fa9d168b462d7ace18cc3d4.tar.gz uhd-8c0c30642d47d17e2fa9d168b462d7ace18cc3d4.tar.bz2 uhd-8c0c30642d47d17e2fa9d168b462d7ace18cc3d4.zip | |
fpga: Remove stale references to UHD_FPGA_DIR
Diffstat (limited to 'fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile')
| -rw-r--r-- | fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile index 8fffd1c2e..92720c8ad 100644 --- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile +++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_siggen/Makefile @@ -7,8 +7,7 @@ #------------------------------------------------- # Top-of-Makefile #------------------------------------------------- -# Define BASE_DIR to point to the "top" dir. Note: -# UHD_FPGA_DIR must be passed into this Makefile. +# Define BASE_DIR to point to the "top" dir. BASE_DIR = ../../../../top # Include viv_sim_preample after defining BASE_DIR include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak |