rfnoc: Update blocks to use autogenerated noc_shell

3 files changed, 294 insertions, 282 deletions

diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/noc_shell_radio.v b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/noc_shell_radio.v
index 32ab32b63..faf58840f 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/noc_shell_radio.v
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/noc_shell_radio.v
@@ -1,131 +1,131 @@
 //
-// Copyright 2019 Ettus Research, A National Instruments Company
+// Copyright 2019 Ettus Research, A National Instruments Brand
 //
 // SPDX-License-Identifier: LGPL-3.0-or-later
 //
 // Module: noc_shell_radio
 //
-// Description: A NoC Shell for RFNoC. This should eventually be replaced
-// by an auto-generated NoC Shell.
+// Description: 
 //
+//   This is a tool-generated NoC-shell for the radio block.
+//   See the RFNoC specification for more information about NoC shells.
+//
+// Parameters:
+//
+//   THIS_PORTID : Control crossbar port to which this block is connected
+//   CHDR_W      : AXIS-CHDR data bus width
+//   MTU         : Maximum transmission unit (i.e., maximum packet size in
+//
+
+`default_nettype none
+
 
 module noc_shell_radio #(
-  parameter [31:0] NOC_ID          = 32'h0,
-  parameter [ 9:0] THIS_PORTID     = 10'd0,
-  parameter        CHDR_W          = 64,
-  parameter [ 0:0] CTRLPORT_SLV_EN = 1,
-  parameter [ 0:0] CTRLPORT_MST_EN = 1,
-  parameter [ 5:0] CTRL_FIFO_SIZE  = 9,
-  parameter [ 5:0] NUM_DATA_I      = 1,
-  parameter [ 5:0] NUM_DATA_O      = 1,
-  parameter        ITEM_W          = 32,
-  parameter        NIPC            = 2,
-  parameter        PYLD_FIFO_SIZE  = 10,
-  parameter        MTU             = 10
-)(
-  //---------------------------------------------------------------------------
+  parameter [9:0] THIS_PORTID     = 10'd0,
+  parameter       CHDR_W          = 64,
+  parameter [5:0] MTU             = 10,
+  parameter       NUM_PORTS       = 2,
+  parameter       NIPC            = 1,
+  parameter       ITEM_W          = 32
+) (
+  //---------------------
   // Framework Interface
-  //---------------------------------------------------------------------------
+  //---------------------
 
-  // RFNoC Framework Clocks and Resets
-  input  wire                           rfnoc_chdr_clk,
-  output wire                           rfnoc_chdr_rst,
-  input  wire                           rfnoc_ctrl_clk,
-  output wire                           rfnoc_ctrl_rst,
-  // RFNoC Backend Interface
-  input  wire [                  511:0] rfnoc_core_config,
-  output wire [                  511:0] rfnoc_core_status,
-  // CHDR Input Ports (from framework)
-  input  wire [(CHDR_W*NUM_DATA_I)-1:0] s_rfnoc_chdr_tdata,
-  input  wire [         NUM_DATA_I-1:0] s_rfnoc_chdr_tlast,
-  input  wire [         NUM_DATA_I-1:0] s_rfnoc_chdr_tvalid,
-  output wire [         NUM_DATA_I-1:0] s_rfnoc_chdr_tready,
-  // CHDR Output Ports (to framework)
-  output wire [(CHDR_W*NUM_DATA_O)-1:0] m_rfnoc_chdr_tdata,
-  output wire [         NUM_DATA_O-1:0] m_rfnoc_chdr_tlast,
-  output wire [         NUM_DATA_O-1:0] m_rfnoc_chdr_tvalid,
-  input  wire [         NUM_DATA_O-1:0] m_rfnoc_chdr_tready,
-  // AXIS-Ctrl Input Port (from framework)
-  input  wire [                   31:0] s_rfnoc_ctrl_tdata,
-  input  wire                           s_rfnoc_ctrl_tlast,
-  input  wire                           s_rfnoc_ctrl_tvalid,
-  output wire                           s_rfnoc_ctrl_tready,
-  // AXIS-Ctrl Output Port (to framework)
-  output wire [                   31:0] m_rfnoc_ctrl_tdata,
-  output wire                           m_rfnoc_ctrl_tlast,
-  output wire                           m_rfnoc_ctrl_tvalid,
-  input  wire                           m_rfnoc_ctrl_tready,
+  // RFNoC Framework Clocks
+  input  wire rfnoc_chdr_clk,
+  input  wire rfnoc_ctrl_clk,
+  input  wire radio_clk,
 
-  //---------------------------------------------------------------------------
-  // Client Control Port Interface
-  //---------------------------------------------------------------------------
+  // NoC Shell Generated Resets
+  output wire rfnoc_chdr_rst,
+  output wire rfnoc_ctrl_rst,
+  output wire radio_rst,
 
-  // Clock
-  input  wire        ctrlport_clk,
-  input  wire        ctrlport_rst,
-  // Master
-  output wire        m_ctrlport_req_wr,
-  output wire        m_ctrlport_req_rd,
-  output wire [19:0] m_ctrlport_req_addr,
-  output wire [31:0] m_ctrlport_req_data,
-  output wire [ 3:0] m_ctrlport_req_byte_en,
-  output wire        m_ctrlport_req_has_time,
-  output wire [63:0] m_ctrlport_req_time,
-  input  wire        m_ctrlport_resp_ack,
-  input  wire [ 1:0] m_ctrlport_resp_status,
-  input  wire [31:0] m_ctrlport_resp_data,
-  // Slave
-  input  wire        s_ctrlport_req_wr,
-  input  wire        s_ctrlport_req_rd,
-  input  wire [19:0] s_ctrlport_req_addr,
-  input  wire [ 9:0] s_ctrlport_req_portid,
-  input  wire [15:0] s_ctrlport_req_rem_epid,
-  input  wire [ 9:0] s_ctrlport_req_rem_portid,
-  input  wire [31:0] s_ctrlport_req_data,
-  input  wire [ 3:0] s_ctrlport_req_byte_en,
-  input  wire        s_ctrlport_req_has_time,
-  input  wire [63:0] s_ctrlport_req_time,
-  output wire        s_ctrlport_resp_ack,
-  output wire [ 1:0] s_ctrlport_resp_status,
-  output wire [31:0] s_ctrlport_resp_data,
+  // RFNoC Backend Interface
+  input  wire [511:0]          rfnoc_core_config,
+  output wire [511:0]          rfnoc_core_status,
 
-  //---------------------------------------------------------------------------
-  // Client Data Interface
-  //---------------------------------------------------------------------------
+  // AXIS-CHDR Input Ports (from framework)
+  input  wire [(0+NUM_PORTS)*CHDR_W-1:0] s_rfnoc_chdr_tdata,
+  input  wire [(0+NUM_PORTS)-1:0]        s_rfnoc_chdr_tlast,
+  input  wire [(0+NUM_PORTS)-1:0]        s_rfnoc_chdr_tvalid,
+  output wire [(0+NUM_PORTS)-1:0]        s_rfnoc_chdr_tready,
+  // AXIS-CHDR Output Ports (to framework)
+  output wire [(0+NUM_PORTS)*CHDR_W-1:0] m_rfnoc_chdr_tdata,
+  output wire [(0+NUM_PORTS)-1:0]        m_rfnoc_chdr_tlast,
+  output wire [(0+NUM_PORTS)-1:0]        m_rfnoc_chdr_tvalid,
+  input  wire [(0+NUM_PORTS)-1:0]        m_rfnoc_chdr_tready,
 
-  // Clock
-  input  wire                                axis_data_clk,
-  input  wire                                axis_data_rst,
+  // AXIS-Ctrl Control Input Port (from framework)
+  input  wire [31:0]           s_rfnoc_ctrl_tdata,
+  input  wire                  s_rfnoc_ctrl_tlast,
+  input  wire                  s_rfnoc_ctrl_tvalid,
+  output wire                  s_rfnoc_ctrl_tready,
+  // AXIS-Ctrl Control Output Port (to framework)
+  output wire [31:0]           m_rfnoc_ctrl_tdata,
+  output wire                  m_rfnoc_ctrl_tlast,
+  output wire                  m_rfnoc_ctrl_tvalid,
+  input  wire                  m_rfnoc_ctrl_tready,
 
-  // Output data stream (to user logic)
-  output wire [(NUM_DATA_I*ITEM_W*NIPC)-1:0] m_axis_tdata,
-  output wire [       (NUM_DATA_I*NIPC)-1:0] m_axis_tkeep,
-  output wire [              NUM_DATA_I-1:0] m_axis_tlast,
-  output wire [              NUM_DATA_I-1:0] m_axis_tvalid,
-  input  wire [              NUM_DATA_I-1:0] m_axis_tready,
-  // Sideband information
-  output wire [         (NUM_DATA_I*64)-1:0] m_axis_ttimestamp,
-  output wire [              NUM_DATA_I-1:0] m_axis_thas_time,
-  output wire [              NUM_DATA_I-1:0] m_axis_teov,
-  output wire [              NUM_DATA_I-1:0] m_axis_teob,
+  //---------------------
+  // Client Interface
+  //---------------------
 
-  // Input data stream (from user logic)
-  input  wire [(NUM_DATA_O*ITEM_W*NIPC)-1:0] s_axis_tdata,
-  input  wire [       (NUM_DATA_O*NIPC)-1:0] s_axis_tkeep,
-  input  wire [              NUM_DATA_O-1:0] s_axis_tlast,
-  input  wire [              NUM_DATA_O-1:0] s_axis_tvalid,
-  output wire [              NUM_DATA_O-1:0] s_axis_tready,
-  // Sideband info (sampled on the first cycle of the packet)
-  input  wire [         (NUM_DATA_O*64)-1:0] s_axis_ttimestamp,
-  input  wire [              NUM_DATA_O-1:0] s_axis_thas_time,
-  input  wire [              NUM_DATA_O-1:0] s_axis_teov,
-  input  wire [              NUM_DATA_O-1:0] s_axis_teob
+  // CtrlPort Clock and Reset
+  output wire               ctrlport_clk,
+  output wire               ctrlport_rst,
+  // CtrlPort Master
+  output wire               m_ctrlport_req_wr,
+  output wire               m_ctrlport_req_rd,
+  output wire [19:0]        m_ctrlport_req_addr,
+  output wire [31:0]        m_ctrlport_req_data,
+  output wire [3:0]         m_ctrlport_req_byte_en,
+  output wire               m_ctrlport_req_has_time,
+  output wire [63:0]        m_ctrlport_req_time,
+  input  wire               m_ctrlport_resp_ack,
+  input  wire [1:0]         m_ctrlport_resp_status,
+  input  wire [31:0]        m_ctrlport_resp_data,
+  // CtrlPort Slave
+  input  wire               s_ctrlport_req_wr,
+  input  wire               s_ctrlport_req_rd,
+  input  wire [19:0]        s_ctrlport_req_addr,
+  input  wire [9:0]         s_ctrlport_req_portid,
+  input  wire [15:0]        s_ctrlport_req_rem_epid,
+  input  wire [9:0]         s_ctrlport_req_rem_portid,
+  input  wire [31:0]        s_ctrlport_req_data,
+  input  wire [3:0]         s_ctrlport_req_byte_en,
+  input  wire               s_ctrlport_req_has_time,
+  input  wire [63:0]        s_ctrlport_req_time,
+  output wire               s_ctrlport_resp_ack,
+  output wire [1:0]         s_ctrlport_resp_status,
+  output wire [31:0]        s_ctrlport_resp_data,
+
+  // AXI-Stream Data Clock and Reset
+  output wire               axis_data_clk,
+  output wire               axis_data_rst,
+  // Data Stream to User Logic: in
+  output wire [NUM_PORTS*ITEM_W*NIPC-1:0]   m_in_axis_tdata,
+  output wire [NUM_PORTS*NIPC-1:0]      m_in_axis_tkeep,
+  output wire [NUM_PORTS-1:0]        m_in_axis_tlast,
+  output wire [NUM_PORTS-1:0]        m_in_axis_tvalid,
+  input  wire [NUM_PORTS-1:0]        m_in_axis_tready,
+  output wire [NUM_PORTS*64-1:0]     m_in_axis_ttimestamp,
+  output wire [NUM_PORTS-1:0]        m_in_axis_thas_time,
+  output wire [NUM_PORTS*16-1:0]     m_in_axis_tlength,
+  output wire [NUM_PORTS-1:0]        m_in_axis_teov,
+  output wire [NUM_PORTS-1:0]        m_in_axis_teob,
+  // Data Stream to User Logic: out
+  input  wire [NUM_PORTS*ITEM_W*NIPC-1:0]   s_out_axis_tdata,
+  input  wire [NUM_PORTS*NIPC-1:0]      s_out_axis_tkeep,
+  input  wire [NUM_PORTS-1:0]        s_out_axis_tlast,
+  input  wire [NUM_PORTS-1:0]        s_out_axis_tvalid,
+  output wire [NUM_PORTS-1:0]        s_out_axis_tready,
+  input  wire [NUM_PORTS*64-1:0]     s_out_axis_ttimestamp,
+  input  wire [NUM_PORTS-1:0]        s_out_axis_thas_time,
+  input  wire [NUM_PORTS-1:0]        s_out_axis_teov,
+  input  wire [NUM_PORTS-1:0]        s_out_axis_teob
 );
-  
-  localparam SNK_INFO_FIFO_SIZE = 4;
-  localparam SNK_PYLD_FIFO_SIZE = PYLD_FIFO_SIZE;
-  localparam SRC_INFO_FIFO_SIZE = 4;
-  localparam SRC_PYLD_FIFO_SIZE = MTU;
 
   //---------------------------------------------------------------------------
   //  Backend Interface
@@ -141,18 +141,18 @@ module noc_shell_radio #(
   wire [63:0]  data_o_flush_done;
 
   backend_iface #(
-    .NOC_ID        (NOC_ID),
-    .NUM_DATA_I    (NUM_DATA_I),
-    .NUM_DATA_O    (NUM_DATA_O),
-    .CTRL_FIFOSIZE (CTRL_FIFO_SIZE),
+    .NOC_ID        (32'h12AD1000),
+    .NUM_DATA_I    (0+NUM_PORTS),
+    .NUM_DATA_O    (0+NUM_PORTS),
+    .CTRL_FIFOSIZE ($clog2(512)),
     .MTU           (MTU)
   ) backend_iface_i (
     .rfnoc_chdr_clk       (rfnoc_chdr_clk),
+    .rfnoc_chdr_rst       (rfnoc_chdr_rst),
     .rfnoc_ctrl_clk       (rfnoc_ctrl_clk),
+    .rfnoc_ctrl_rst       (rfnoc_ctrl_rst),
     .rfnoc_core_config    (rfnoc_core_config),
     .rfnoc_core_status    (rfnoc_core_status),
-    .rfnoc_chdr_rst       (rfnoc_chdr_rst),
-    .rfnoc_ctrl_rst       (rfnoc_ctrl_rst),
     .data_i_flush_en      (data_i_flush_en),
     .data_i_flush_timeout (data_i_flush_timeout),
     .data_i_flush_active  (data_i_flush_active),
@@ -164,51 +164,70 @@ module noc_shell_radio #(
   );
 
   //---------------------------------------------------------------------------
+  //  Reset Generation
+  //---------------------------------------------------------------------------
+
+  wire radio_rst_pulse;
+
+  pulse_synchronizer #(.MODE ("POSEDGE")) pulse_synchronizer_radio (
+    .clk_a(rfnoc_chdr_clk), .rst_a(1'b0), .pulse_a (rfnoc_chdr_rst), .busy_a (),
+    .clk_b(radio_clk), .pulse_b (radio_rst_pulse)
+  );
+
+  pulse_stretch_min #(.LENGTH(32)) pulse_stretch_min_radio (
+    .clk(radio_clk), .rst(1'b0),
+    .pulse_in(radio_rst_pulse), .pulse_out(radio_rst)
+  );
+
+  //---------------------------------------------------------------------------
   //  Control Path
   //---------------------------------------------------------------------------
 
+  assign ctrlport_clk = radio_clk;
+  assign ctrlport_rst = radio_rst;
+
   ctrlport_endpoint #(
-    .THIS_PORTID              (THIS_PORTID    ),
-    .SYNC_CLKS                (0              ),
-    .AXIS_CTRL_MST_EN         (CTRLPORT_SLV_EN),
-    .AXIS_CTRL_SLV_EN         (CTRLPORT_MST_EN),
-    .SLAVE_FIFO_SIZE          (CTRL_FIFO_SIZE )
-  ) ctrlport_ep_i (
-    .rfnoc_ctrl_clk           (rfnoc_ctrl_clk           ),
-    .rfnoc_ctrl_rst           (rfnoc_ctrl_rst           ),
-    .ctrlport_clk             (ctrlport_clk             ),
-    .ctrlport_rst             (ctrlport_rst             ),
-    .s_rfnoc_ctrl_tdata       (s_rfnoc_ctrl_tdata       ),
-    .s_rfnoc_ctrl_tlast       (s_rfnoc_ctrl_tlast       ),
-    .s_rfnoc_ctrl_tvalid      (s_rfnoc_ctrl_tvalid      ),
-    .s_rfnoc_ctrl_tready      (s_rfnoc_ctrl_tready      ),
-    .m_rfnoc_ctrl_tdata       (m_rfnoc_ctrl_tdata       ),
-    .m_rfnoc_ctrl_tlast       (m_rfnoc_ctrl_tlast       ),
-    .m_rfnoc_ctrl_tvalid      (m_rfnoc_ctrl_tvalid      ),
-    .m_rfnoc_ctrl_tready      (m_rfnoc_ctrl_tready      ),
-    .m_ctrlport_req_wr        (m_ctrlport_req_wr        ),
-    .m_ctrlport_req_rd        (m_ctrlport_req_rd        ),
-    .m_ctrlport_req_addr      (m_ctrlport_req_addr      ),
-    .m_ctrlport_req_data      (m_ctrlport_req_data      ),
-    .m_ctrlport_req_byte_en   (m_ctrlport_req_byte_en   ),
-    .m_ctrlport_req_has_time  (m_ctrlport_req_has_time  ),
-    .m_ctrlport_req_time      (m_ctrlport_req_time      ),
-    .m_ctrlport_resp_ack      (m_ctrlport_resp_ack      ),
-    .m_ctrlport_resp_status   (m_ctrlport_resp_status   ),
-    .m_ctrlport_resp_data     (m_ctrlport_resp_data     ),
-    .s_ctrlport_req_wr        (s_ctrlport_req_wr        ),
-    .s_ctrlport_req_rd        (s_ctrlport_req_rd        ),
-    .s_ctrlport_req_addr      (s_ctrlport_req_addr      ),
-    .s_ctrlport_req_portid    (s_ctrlport_req_portid    ),
-    .s_ctrlport_req_rem_epid  (s_ctrlport_req_rem_epid  ),
-    .s_ctrlport_req_rem_portid(s_ctrlport_req_rem_portid),
-    .s_ctrlport_req_data      (s_ctrlport_req_data      ),
-    .s_ctrlport_req_byte_en   (s_ctrlport_req_byte_en   ),
-    .s_ctrlport_req_has_time  (s_ctrlport_req_has_time  ),
-    .s_ctrlport_req_time      (s_ctrlport_req_time      ),
-    .s_ctrlport_resp_ack      (s_ctrlport_resp_ack      ),
-    .s_ctrlport_resp_status   (s_ctrlport_resp_status   ),
-    .s_ctrlport_resp_data     (s_ctrlport_resp_data     )
+    .THIS_PORTID      (THIS_PORTID),
+    .SYNC_CLKS        (0),
+    .AXIS_CTRL_MST_EN (1),
+    .AXIS_CTRL_SLV_EN (1),
+    .SLAVE_FIFO_SIZE  ($clog2(512))
+  ) ctrlport_endpoint_i (
+    .rfnoc_ctrl_clk            (rfnoc_ctrl_clk),
+    .rfnoc_ctrl_rst            (rfnoc_ctrl_rst),
+    .ctrlport_clk              (ctrlport_clk),
+    .ctrlport_rst              (ctrlport_rst),
+    .s_rfnoc_ctrl_tdata        (s_rfnoc_ctrl_tdata),
+    .s_rfnoc_ctrl_tlast        (s_rfnoc_ctrl_tlast),
+    .s_rfnoc_ctrl_tvalid       (s_rfnoc_ctrl_tvalid),
+    .s_rfnoc_ctrl_tready       (s_rfnoc_ctrl_tready),
+    .m_rfnoc_ctrl_tdata        (m_rfnoc_ctrl_tdata),
+    .m_rfnoc_ctrl_tlast        (m_rfnoc_ctrl_tlast),
+    .m_rfnoc_ctrl_tvalid       (m_rfnoc_ctrl_tvalid),
+    .m_rfnoc_ctrl_tready       (m_rfnoc_ctrl_tready),
+    .m_ctrlport_req_wr         (m_ctrlport_req_wr),
+    .m_ctrlport_req_rd         (m_ctrlport_req_rd),
+    .m_ctrlport_req_addr       (m_ctrlport_req_addr),
+    .m_ctrlport_req_data       (m_ctrlport_req_data),
+    .m_ctrlport_req_byte_en    (m_ctrlport_req_byte_en),
+    .m_ctrlport_req_has_time   (m_ctrlport_req_has_time),
+    .m_ctrlport_req_time       (m_ctrlport_req_time),
+    .m_ctrlport_resp_ack       (m_ctrlport_resp_ack),
+    .m_ctrlport_resp_status    (m_ctrlport_resp_status),
+    .m_ctrlport_resp_data      (m_ctrlport_resp_data),
+    .s_ctrlport_req_wr         (s_ctrlport_req_wr),
+    .s_ctrlport_req_rd         (s_ctrlport_req_rd),
+    .s_ctrlport_req_addr       (s_ctrlport_req_addr),
+    .s_ctrlport_req_portid     (s_ctrlport_req_portid),
+    .s_ctrlport_req_rem_epid   (s_ctrlport_req_rem_epid),
+    .s_ctrlport_req_rem_portid (s_ctrlport_req_rem_portid),
+    .s_ctrlport_req_data       (s_ctrlport_req_data),
+    .s_ctrlport_req_byte_en    (s_ctrlport_req_byte_en),
+    .s_ctrlport_req_has_time   (s_ctrlport_req_has_time),
+    .s_ctrlport_req_time       (s_ctrlport_req_time),
+    .s_ctrlport_resp_ack       (s_ctrlport_resp_ack),
+    .s_ctrlport_resp_status    (s_ctrlport_resp_status),
+    .s_ctrlport_resp_data      (s_ctrlport_resp_data)
   );
 
   //---------------------------------------------------------------------------
@@ -216,75 +235,87 @@ module noc_shell_radio #(
   //---------------------------------------------------------------------------
 
   genvar i;
-  generate
 
-    for (i = 0; i < NUM_DATA_I; i = i + 1) begin: chdr_to_data
-      chdr_to_axis_data #(
-        .CHDR_W         (CHDR_W),
-        .ITEM_W         (ITEM_W),
-        .NIPC           (NIPC),
-        .SYNC_CLKS      (0),
-        .INFO_FIFO_SIZE (SNK_INFO_FIFO_SIZE),
-        .PYLD_FIFO_SIZE (SNK_PYLD_FIFO_SIZE)
-      ) chdr_to_axis_data_i (
-        .axis_chdr_clk      (rfnoc_chdr_clk),
-        .axis_chdr_rst      (rfnoc_chdr_rst),
-        .axis_data_clk      (axis_data_clk),
-        .axis_data_rst      (axis_data_rst),
-        .s_axis_chdr_tdata  (s_rfnoc_chdr_tdata  [(i*CHDR_W)+:CHDR_W]),
-        .s_axis_chdr_tlast  (s_rfnoc_chdr_tlast  [i]),
-        .s_axis_chdr_tvalid (s_rfnoc_chdr_tvalid [i]),
-        .s_axis_chdr_tready (s_rfnoc_chdr_tready [i]),
-        .m_axis_tdata       (m_axis_tdata  [i*ITEM_W*NIPC +: ITEM_W*NIPC]),
-        .m_axis_tkeep       (m_axis_tkeep  [i*NIPC +: NIPC]),
-        .m_axis_tlast       (m_axis_tlast  [i]),
-        .m_axis_tvalid      (m_axis_tvalid [i]),
-        .m_axis_tready      (m_axis_tready [i]),
-        .m_axis_ttimestamp  (m_axis_ttimestamp [i*64 +: 64]),
-        .m_axis_thas_time   (m_axis_thas_time  [i]),
-        .m_axis_tlength     (),
-        .m_axis_teov        (m_axis_teov       [i]),
-        .m_axis_teob        (m_axis_teob       [i]),
-        .flush_en           (data_i_flush_en),
-        .flush_timeout      (data_i_flush_timeout),
-        .flush_active       (data_i_flush_active [i]),
-        .flush_done         (data_i_flush_done   [i])
-      );
-    end
+  assign axis_data_clk = radio_clk;
+  assign axis_data_rst = radio_rst;
+  
+  //---------------------
+  // Input Data Paths
+  //---------------------
+
+  for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_input_in
+    chdr_to_axis_data #(
+      .CHDR_W         (CHDR_W),
+      .ITEM_W         (ITEM_W),
+      .NIPC           (NIPC),
+      .SYNC_CLKS      (0),
+      .INFO_FIFO_SIZE ($clog2(32)),
+      .PYLD_FIFO_SIZE ($clog2(MTU))
+    ) chdr_to_axis_data_in_in (
+      .axis_chdr_clk      (rfnoc_chdr_clk),
+      .axis_chdr_rst      (rfnoc_chdr_rst),
+      .axis_data_clk      (axis_data_clk),
+      .axis_data_rst      (axis_data_rst),
+      .s_axis_chdr_tdata  (s_rfnoc_chdr_tdata[((0+i)*CHDR_W)+:CHDR_W]),
+      .s_axis_chdr_tlast  (s_rfnoc_chdr_tlast[0+i]),
+      .s_axis_chdr_tvalid (s_rfnoc_chdr_tvalid[0+i]),
+      .s_axis_chdr_tready (s_rfnoc_chdr_tready[0+i]),
+      .m_axis_tdata       (m_in_axis_tdata[(ITEM_W*NIPC)*i+:(ITEM_W*NIPC)]),
+      .m_axis_tkeep       (m_in_axis_tkeep[NIPC*i+:NIPC]),
+      .m_axis_tlast       (m_in_axis_tlast[i]),
+      .m_axis_tvalid      (m_in_axis_tvalid[i]),
+      .m_axis_tready      (m_in_axis_tready[i]),
+      .m_axis_ttimestamp  (m_in_axis_ttimestamp[64*i+:64]),
+      .m_axis_thas_time   (m_in_axis_thas_time[i]),
+      .m_axis_tlength     (m_in_axis_tlength[i*16+:16]),
+      .m_axis_teov        (m_in_axis_teov[i]),
+      .m_axis_teob        (m_in_axis_teob[i]),
+      .flush_en           (data_i_flush_en),
+      .flush_timeout      (data_i_flush_timeout),
+      .flush_active       (data_i_flush_active[0+i]),
+      .flush_done         (data_i_flush_done[0+i])
+    );
+  end
+
+  //---------------------
+  // Output Data Paths
+  //---------------------
+
+  for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_output_out
+    axis_data_to_chdr #(
+      .CHDR_W         (CHDR_W),
+      .ITEM_W         (ITEM_W),
+      .NIPC           (NIPC),
+      .SYNC_CLKS      (0),
+      .INFO_FIFO_SIZE ($clog2(32)),
+      .PYLD_FIFO_SIZE ($clog2(MTU)),
+      .MTU            (MTU)
+    ) axis_data_to_chdr_out_out (
+      .axis_chdr_clk      (rfnoc_chdr_clk),
+      .axis_chdr_rst      (rfnoc_chdr_rst),
+      .axis_data_clk      (axis_data_clk),
+      .axis_data_rst      (axis_data_rst),
+      .m_axis_chdr_tdata  (m_rfnoc_chdr_tdata[(0+i)*CHDR_W+:CHDR_W]),
+      .m_axis_chdr_tlast  (m_rfnoc_chdr_tlast[0+i]),
+      .m_axis_chdr_tvalid (m_rfnoc_chdr_tvalid[0+i]),
+      .m_axis_chdr_tready (m_rfnoc_chdr_tready[0+i]),
+      .s_axis_tdata       (s_out_axis_tdata[(ITEM_W*NIPC)*i+:(ITEM_W*NIPC)]),
+      .s_axis_tkeep       (s_out_axis_tkeep[NIPC*i+:NIPC]),
+      .s_axis_tlast       (s_out_axis_tlast[i]),
+      .s_axis_tvalid      (s_out_axis_tvalid[i]),
+      .s_axis_tready      (s_out_axis_tready[i]),
+      .s_axis_ttimestamp  (s_out_axis_ttimestamp[64*i+:64]),
+      .s_axis_thas_time   (s_out_axis_thas_time[i]),
+      .s_axis_teov        (s_out_axis_teov[i]),
+      .s_axis_teob        (s_out_axis_teob[i]),
+      .flush_en           (data_o_flush_en),
+      .flush_timeout      (data_o_flush_timeout),
+      .flush_active       (data_o_flush_active[0+i]),
+      .flush_done         (data_o_flush_done[0+i])
+    );
+  end
+
+endmodule // noc_shell_radio
 
-    for (i = 0; i < NUM_DATA_O; i = i + 1) begin: data_to_chdr
-      axis_data_to_chdr #(
-        .CHDR_W         (CHDR_W),
-        .ITEM_W         (ITEM_W),
-        .NIPC           (NIPC),
-        .SYNC_CLKS      (0),
-        .INFO_FIFO_SIZE (4),
-        .PYLD_FIFO_SIZE (SRC_INFO_FIFO_SIZE),
-        .MTU            (SRC_PYLD_FIFO_SIZE)
-      ) axis_data_to_chdr_i (
-        .axis_chdr_clk       (rfnoc_chdr_clk),
-        .axis_chdr_rst       (rfnoc_chdr_rst),
-        .axis_data_clk       (axis_data_clk),
-        .axis_data_rst       (axis_data_rst),
-        .m_axis_chdr_tdata   (m_rfnoc_chdr_tdata  [i*CHDR_W +: CHDR_W]),
-        .m_axis_chdr_tlast   (m_rfnoc_chdr_tlast  [i]),
-        .m_axis_chdr_tvalid  (m_rfnoc_chdr_tvalid [i]),
-        .m_axis_chdr_tready  (m_rfnoc_chdr_tready [i]),
-        .s_axis_tdata        (s_axis_tdata  [i*ITEM_W*NIPC +: ITEM_W*NIPC]),
-        .s_axis_tkeep        (s_axis_tkeep  [i*NIPC +: NIPC]),
-        .s_axis_tlast        (s_axis_tlast  [i]),
-        .s_axis_tvalid       (s_axis_tvalid [i]),
-        .s_axis_tready       (s_axis_tready [i]),
-        .s_axis_ttimestamp   (s_axis_ttimestamp [i*64 +: 64]),
-        .s_axis_thas_time    (s_axis_thas_time  [i]),
-        .s_axis_teov         (s_axis_teov       [i]),
-        .s_axis_teob         (s_axis_teob       [i]),
-        .flush_en            (data_o_flush_en),
-        .flush_timeout       (data_o_flush_timeout),
-        .flush_active        (data_o_flush_active [i]),
-        .flush_done          (data_o_flush_done   [i])
-      );
-    end
-  endgenerate
 
-endmodule
+`default_nettype wire
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
index a97b141c0..4af699593 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio.v
@@ -16,8 +16,6 @@
 //   NUM_PORTS        : Number of radio channels (RX/TX pairs)
 //   MTU              : Maximum transmission unit (i.e., maximum packet size) 
 //                      in CHDR words is 2**MTU.
-//   CTRL_FIFO_SIZE   : Size of the Control Port slave FIFO. This affects the
-//                      number of outstanding commands that can be pending.
 //   PERIPH_BASE_ADDR : CTRL port peripheral window base address
 //   PERIPH_ADDR_W    : CTRL port peripheral address space = 2**PERIPH_ADDR_W
 //
@@ -30,7 +28,6 @@ module rfnoc_block_radio #(
   parameter ITEM_W           = 32,
   parameter NUM_PORTS        = 2,
   parameter MTU              = 10,
-  parameter CTRL_FIFO_SIZE   = 9,
   parameter PERIPH_BASE_ADDR = 20'h80000,
   parameter PERIPH_ADDR_W    = 19
 ) (
@@ -115,7 +112,6 @@ module rfnoc_block_radio #(
   `include "rfnoc_block_radio_regs.vh"
   `include "../../core/rfnoc_axis_ctrl_utils.vh"
 
-  localparam NOC_ID  = 32'h12AD1000;
   localparam RADIO_W = NIPC*ITEM_W;
 
 
@@ -144,8 +140,10 @@ module rfnoc_block_radio #(
   wire        ctrlport_reg_has_time;
   wire [63:0] ctrlport_reg_time;
   wire [31:0] ctrlport_reg_req_data;
+  wire [ 3:0] ctrlport_reg_req_byte_en;
   wire [31:0] ctrlport_reg_resp_data;
   wire        ctrlport_reg_resp_ack;
+  wire [ 1:0] ctrlport_reg_resp_status;
 
   // Control port signals used for error reporting (user logic masters to NoC shell)
   wire        ctrlport_err_req_wr;
@@ -163,27 +161,22 @@ module rfnoc_block_radio #(
   // NoC Shell
   //---------------------------------------------------------------------------
 
-  wire rfnoc_chdr_rst;
   wire radio_rst;
 
   noc_shell_radio #(
-    .NOC_ID          (NOC_ID),
     .THIS_PORTID     (THIS_PORTID),
     .CHDR_W          (CHDR_W),
-    .CTRLPORT_SLV_EN (1),
-    .CTRLPORT_MST_EN (1),
-    .CTRL_FIFO_SIZE  (CTRL_FIFO_SIZE),
-    .NUM_DATA_I      (NUM_PORTS),
-    .NUM_DATA_O      (NUM_PORTS),
-    .ITEM_W          (ITEM_W),
+    .MTU             (MTU),
+    .NUM_PORTS       (NUM_PORTS),
     .NIPC            (NIPC),
-    .PYLD_FIFO_SIZE  (MTU),
-    .MTU             (MTU)
+    .ITEM_W          (ITEM_W)
   ) noc_shell_radio_i (
     .rfnoc_chdr_clk            (rfnoc_chdr_clk),
-    .rfnoc_chdr_rst            (rfnoc_chdr_rst),
     .rfnoc_ctrl_clk            (rfnoc_ctrl_clk),
+    .radio_clk                 (radio_clk),
+    .rfnoc_chdr_rst            (),
     .rfnoc_ctrl_rst            (),
+    .radio_rst                 (radio_rst),
     .rfnoc_core_config         (rfnoc_core_config),
     .rfnoc_core_status         (rfnoc_core_status),
     .s_rfnoc_chdr_tdata        (s_rfnoc_chdr_tdata),
@@ -202,17 +195,17 @@ module rfnoc_block_radio #(
     .m_rfnoc_ctrl_tlast        (m_rfnoc_ctrl_tlast),
     .m_rfnoc_ctrl_tvalid       (m_rfnoc_ctrl_tvalid),
     .m_rfnoc_ctrl_tready       (m_rfnoc_ctrl_tready),
-    .ctrlport_clk              (radio_clk),
-    .ctrlport_rst              (radio_rst),
+    .ctrlport_clk              (),
+    .ctrlport_rst              (),
     .m_ctrlport_req_wr         (ctrlport_reg_req_wr),
     .m_ctrlport_req_rd         (ctrlport_reg_req_rd),
     .m_ctrlport_req_addr       (ctrlport_reg_req_addr),
     .m_ctrlport_req_data       (ctrlport_reg_req_data),
-    .m_ctrlport_req_byte_en    (),
+    .m_ctrlport_req_byte_en    (ctrlport_reg_req_byte_en),
     .m_ctrlport_req_has_time   (ctrlport_reg_has_time),
     .m_ctrlport_req_time       (ctrlport_reg_time),
     .m_ctrlport_resp_ack       (ctrlport_reg_resp_ack),
-    .m_ctrlport_resp_status    (AXIS_CTRL_STS_OKAY),
+    .m_ctrlport_resp_status    (ctrlport_reg_resp_status),
     .m_ctrlport_resp_data      (ctrlport_reg_resp_data),
     .s_ctrlport_req_wr         (ctrlport_err_req_wr),
     .s_ctrlport_req_rd         (1'b0),
@@ -227,38 +220,27 @@ module rfnoc_block_radio #(
     .s_ctrlport_resp_ack       (ctrlport_err_resp_ack),
     .s_ctrlport_resp_status    (),
     .s_ctrlport_resp_data      (),
-    .axis_data_clk             (radio_clk),
-    .axis_data_rst             (radio_rst),
-    .m_axis_tdata              (axis_tx_tdata),
-    .m_axis_tkeep              (),                          // Radio only transmits full words
-    .m_axis_tlast              (axis_tx_tlast),
-    .m_axis_tvalid             (axis_tx_tvalid),
-    .m_axis_tready             (axis_tx_tready),
-    .m_axis_ttimestamp         (axis_tx_ttimestamp),
-    .m_axis_thas_time          (axis_tx_thas_time),
-    .m_axis_teov               (),
-    .m_axis_teob               (axis_tx_teob),
-    .s_axis_tdata              (axis_rx_tdata),
-    .s_axis_tkeep              ({NUM_PORTS*NIPC{1'b1}}), // Radio only receives full words
-    .s_axis_tlast              (axis_rx_tlast),
-    .s_axis_tvalid             (axis_rx_tvalid),
-    .s_axis_tready             (axis_rx_tready),
-    .s_axis_ttimestamp         (axis_rx_ttimestamp),
-    .s_axis_thas_time          (axis_rx_thas_time),
-    .s_axis_teov               ({NUM_PORTS{1'b0}}),
-    .s_axis_teob               (axis_rx_teob)
-  );
-
-  // Cross the CHDR reset to the radio_clk domain
-  pulse_synchronizer #(
-    .MODE ("POSEDGE")
-  ) ctrl_rst_sync_i (
-    .clk_a   (rfnoc_chdr_clk),
-    .rst_a   (1'b0),
-    .pulse_a (rfnoc_chdr_rst),
-    .busy_a  (),
-    .clk_b   (radio_clk),
-    .pulse_b (radio_rst)
+    .axis_data_clk             (),
+    .axis_data_rst             (),
+    .m_in_axis_tdata           (axis_tx_tdata),
+    .m_in_axis_tkeep           (),                        // Radio only transmits full words
+    .m_in_axis_tlast           (axis_tx_tlast),
+    .m_in_axis_tvalid          (axis_tx_tvalid),
+    .m_in_axis_tready          (axis_tx_tready),
+    .m_in_axis_ttimestamp      (axis_tx_ttimestamp),
+    .m_in_axis_thas_time       (axis_tx_thas_time),
+    .m_in_axis_tlength         (),
+    .m_in_axis_teov            (),
+    .m_in_axis_teob            (axis_tx_teob),
+    .s_out_axis_tdata          (axis_rx_tdata),
+    .s_out_axis_tkeep          ({NUM_PORTS*NIPC{1'b1}}),  // Radio only receives full words
+    .s_out_axis_tlast          (axis_rx_tlast),
+    .s_out_axis_tvalid         (axis_rx_tvalid),
+    .s_out_axis_tready         (axis_rx_tready),
+    .s_out_axis_ttimestamp     (axis_rx_ttimestamp),
+    .s_out_axis_thas_time      (axis_rx_thas_time),
+    .s_out_axis_teov           ({NUM_PORTS{1'b0}}),
+    .s_out_axis_teob           (axis_rx_teob)
   );
 
 
@@ -304,11 +286,11 @@ module rfnoc_block_radio #(
     .s_ctrlport_req_rd       (ctrlport_reg_req_rd),
     .s_ctrlport_req_addr     (ctrlport_reg_req_addr),
     .s_ctrlport_req_data     (ctrlport_reg_req_data),
-    .s_ctrlport_req_byte_en  (4'b0),
+    .s_ctrlport_req_byte_en  (ctrlport_reg_req_byte_en),
     .s_ctrlport_req_has_time (ctrlport_reg_has_time),
     .s_ctrlport_req_time     (ctrlport_reg_time),
     .s_ctrlport_resp_ack     (ctrlport_reg_resp_ack),
-    .s_ctrlport_resp_status  (),
+    .s_ctrlport_resp_status  (ctrlport_reg_resp_status),
     .s_ctrlport_resp_data    (ctrlport_reg_resp_data),
     .m_ctrlport_req_wr       ({m_ctrlport_req_wr,
                                ctrlport_core_req_wr,
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
index 706e0f185..b42d3d8da 100644
--- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
+++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_radio/rfnoc_block_radio_tb.sv
@@ -34,6 +34,7 @@ module rfnoc_block_radio_tb #(
 
 
   // Simulation Parameters
+  localparam int          NOC_ID         = 32'h12AD1000;
   localparam logic [ 9:0] THIS_PORTID    = 10'h17;
   localparam logic [15:0] THIS_EPID      = 16'hDEAD;
   localparam int          MTU            = 8;
@@ -555,11 +556,9 @@ module rfnoc_block_radio_tb #(
     test.start_test("Verify Block Info", 2us);
 
     // Get static block info and validate it
-    `ASSERT_ERROR(blk_ctrl.get_noc_id() == rfnoc_block_radio_i.NOC_ID, "Incorrect noc_id Value");
+    `ASSERT_ERROR(blk_ctrl.get_noc_id() == NOC_ID, "Incorrect noc_id Value");
     `ASSERT_ERROR(blk_ctrl.get_num_data_i() == NUM_PORTS, "Incorrect num_data_i Value");
     `ASSERT_ERROR(blk_ctrl.get_num_data_o() == NUM_PORTS, "Incorrect num_data_o Value");
-    `ASSERT_ERROR(blk_ctrl.get_ctrl_fifosize() == rfnoc_block_radio_i.noc_shell_radio_i.CTRL_FIFO_SIZE,
-      "Incorrect ctrl_fifosize Value");
     `ASSERT_ERROR(blk_ctrl.get_mtu() == MTU, "Incorrect mtu Value");
 
     test.end_test();