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| author | Wade Fife <wade.fife@ettus.com> | 2021-12-06 11:54:36 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-12-08 08:36:46 -0600 |
| commit | 270a7e13c365d05ba04ab44a2f844d96ba15f43b (patch) | |
| tree | b42935844186e0cb0769e87ba2f9d7f0e7fb4e0a /fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc | |
| parent | f23ab72129041777bcd3357a1f4e37b29e62dd86 (diff) | |
| download | uhd-270a7e13c365d05ba04ab44a2f844d96ba15f43b.tar.gz uhd-270a7e13c365d05ba04ab44a2f844d96ba15f43b.tar.bz2 uhd-270a7e13c365d05ba04ab44a2f844d96ba15f43b.zip | |
rfnoc: Fix noc_shell direction comments
Some comments describing data flow direction were wrong. This commit
updates the Mako files and updates the noc_shell modules with newly
generated versions.
Diffstat (limited to 'fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc')
| -rw-r--r-- | fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/noc_shell_ddc.v | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/noc_shell_ddc.v b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/noc_shell_ddc.v index c4b362cd6..a4874114f 100644 --- a/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/noc_shell_ddc.v +++ b/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_ddc/noc_shell_ddc.v @@ -1,11 +1,11 @@ // -// Copyright 2019 Ettus Research, A National Instruments Brand +// Copyright 2021 Ettus Research, a National Instruments Brand // // SPDX-License-Identifier: LGPL-3.0-or-later // // Module: noc_shell_ddc // -// Description: +// Description: // // This is a tool-generated NoC-shell for the ddc block. // See the RFNoC specification for more information about NoC shells. @@ -99,7 +99,7 @@ module noc_shell_ddc #( output wire [NUM_PORTS*16-1:0] m_in_axis_tlength, output wire [NUM_PORTS-1:0] m_in_axis_teov, output wire [NUM_PORTS-1:0] m_in_axis_teob, - // Data Stream to User Logic: out + // Data Stream from User Logic: out input wire [NUM_PORTS*32*1-1:0] s_out_axis_tdata, input wire [NUM_PORTS*1-1:0] s_out_axis_tkeep, input wire [NUM_PORTS-1:0] s_out_axis_tlast, @@ -222,7 +222,7 @@ module noc_shell_ddc #( assign axis_data_clk = ce_clk; assign axis_data_rst = ce_rst; - + //--------------------- // Input Data Paths //--------------------- @@ -251,7 +251,7 @@ module noc_shell_ddc #( .m_axis_tready (m_in_axis_tready[i]), .m_axis_ttimestamp (m_in_axis_ttimestamp[64*i+:64]), .m_axis_thas_time (m_in_axis_thas_time[i]), - .m_axis_tlength (m_in_axis_tlength[i*16+:16]), + .m_axis_tlength (m_in_axis_tlength[16*i+:16]), .m_axis_teov (m_in_axis_teov[i]), .m_axis_teob (m_in_axis_teob[i]), .flush_en (data_i_flush_en), @@ -267,13 +267,14 @@ module noc_shell_ddc #( for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_output_out axis_data_to_chdr #( - .CHDR_W (CHDR_W), - .ITEM_W (32), - .NIPC (1), - .SYNC_CLKS (0), - .INFO_FIFO_SIZE ($clog2(32)), - .PYLD_FIFO_SIZE ($clog2(MTU)), - .MTU (MTU) + .CHDR_W (CHDR_W), + .ITEM_W (32), + .NIPC (1), + .SYNC_CLKS (0), + .INFO_FIFO_SIZE ($clog2(32)), + .PYLD_FIFO_SIZE ($clog2(MTU)), + .MTU (MTU), + .SIDEBAND_AT_END (1) ) axis_data_to_chdr_out_out ( .axis_chdr_clk (rfnoc_chdr_clk), .axis_chdr_rst (rfnoc_chdr_rst), @@ -290,6 +291,7 @@ module noc_shell_ddc #( .s_axis_tready (s_out_axis_tready[i]), .s_axis_ttimestamp (s_out_axis_ttimestamp[64*i+:64]), .s_axis_thas_time (s_out_axis_thas_time[i]), + .s_axis_tlength (16'd0), .s_axis_teov (s_out_axis_teov[i]), .s_axis_teob (s_out_axis_teob[i]), .flush_en (data_o_flush_en), |