fpga: rfnoc: Fix EOB loss in DUC

There were some rare corner cases where the EOB could get lost in the
DUC due to the dds_timed logic not always passing it through as it
should. This resulted in an underflow error message at the end of
transmission.

This commit also fixes an issue where part of the last packet
used a frequency shift of 0 instead of the requested frequency
shift, and an issue where the first few samples of a burst used the
wrong frequency shift value.

Part of the fix includes adding a TUSER port to dds_sin_cos_lut_only.
The TUSER port is built into the IP but was disabled. It is now
enabled and set to 1 bit wide. This has a very small effect on
resource usage and can be left unconnected when not needed.

The dds_freq_tune block was shared by the DUC and DDC. To avoid
affecting the DDC, a new version, dds_freq_tune_duc, is being
added for the DUC to use that has the necessary fixes.

The new dds_wrapper.v is a wrapper for the dds_sin_cos_lut_only IP.
This IP has the undesirable behavior that new inputs must be provided
to push previous outputs through the IP. This wrapper hides that
complexity by adding some logic to ensure all data gets pushed through
automatically. This logic uses the TUSER port on the IP.

Finally, a testbench for dds_timed was added.

1 files changed, 2 insertions, 0 deletions

diff --git a/fpga/usrp3/lib/rfnoc/Makefile.srcs b/fpga/usrp3/lib/rfnoc/Makefile.srcs
index ab4a9e179..512569748 100644
--- a/fpga/usrp3/lib/rfnoc/Makefile.srcs
+++ b/fpga/usrp3/lib/rfnoc/Makefile.srcs
@@ -101,6 +101,8 @@ fir_filter_slice.v \
 axi_fir_filter_dec.v \
 addsub.vhd \
 dds_freq_tune.v \
+dds_freq_tune_duc.v \
 dds_timed.v \
+dds_wrapper.v \
 datapath_gatekeeper.v \
 ))