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| author | Martin Braun <martin.braun@ettus.com> | 2020-08-17 13:06:42 +0200 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-08-17 16:23:46 -0500 |
| commit | 86ab211b84c132e61becc294acfff87e1751908d (patch) | |
| tree | c718f49652434f1c5dedb4aafc90b2816392b198 /fpga/usrp3/lib/dsp/ddc_chain.v | |
| parent | b9f9ca2d0fd43f2a55e4ed5301070585cbb1be3c (diff) | |
| download | uhd-86ab211b84c132e61becc294acfff87e1751908d.tar.gz uhd-86ab211b84c132e61becc294acfff87e1751908d.tar.bz2 uhd-86ab211b84c132e61becc294acfff87e1751908d.zip | |
python: power cal: Minor fixes to power cal code
- Fix some typos
- Fix incorrect arg name for RFSGPowerGenerator.enable()
- Fix case where incorrect args would cause an uncaught TypeError. Now,
if USRP is chose as signal generator, but fails to find one, a proper
error is shown.
Diffstat (limited to 'fpga/usrp3/lib/dsp/ddc_chain.v')
0 files changed, 0 insertions, 0 deletions