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authorBen Hilburn <ben.hilburn@ettus.com>2013-10-10 10:17:27 -0700
committerBen Hilburn <ben.hilburn@ettus.com>2013-10-10 10:17:27 -0700
commit0df4b801a34697f2058b4a7b95e08d2a0576c9db (patch)
treebe10e78d1a97c037a9e7492360a178d1873b9c09 /fpga/usrp3/lib/control/por_gen.v
parent6e7bc850b66e8188718248b76b729c7cf9c89700 (diff)
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Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.
Diffstat (limited to 'fpga/usrp3/lib/control/por_gen.v')
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diff --git a/fpga/usrp3/lib/control/por_gen.v b/fpga/usrp3/lib/control/por_gen.v
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+//
+// Copyright 2013 Ettus Research LLC
+//
+
+
+
+module por_gen
+ (input clk,
+ output reset_out);
+
+ reg por_rst;
+ reg [7:0] por_counter = 8'h0;
+
+ always @(posedge clk)
+ if (por_counter != 8'h55)
+ begin
+ por_counter <= por_counter + 8'h1;
+ por_rst <= 1'b1;
+ end
+ else
+ por_rst <= 1'b0;
+
+ assign reset_out = por_rst;
+
+endmodule // por_gen