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| author | Ben Hilburn <ben.hilburn@ettus.com> | 2013-10-10 10:17:27 -0700 |
|---|---|---|
| committer | Ben Hilburn <ben.hilburn@ettus.com> | 2013-10-10 10:17:27 -0700 |
| commit | 0df4b801a34697f2058b4a7b95e08d2a0576c9db (patch) | |
| tree | be10e78d1a97c037a9e7492360a178d1873b9c09 /fpga/usrp3/lib/control/Makefile.srcs | |
| parent | 6e7bc850b66e8188718248b76b729c7cf9c89700 (diff) | |
| download | uhd-0df4b801a34697f2058b4a7b95e08d2a0576c9db.tar.gz uhd-0df4b801a34697f2058b4a7b95e08d2a0576c9db.tar.bz2 uhd-0df4b801a34697f2058b4a7b95e08d2a0576c9db.zip | |
Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.
Diffstat (limited to 'fpga/usrp3/lib/control/Makefile.srcs')
| -rw-r--r-- | fpga/usrp3/lib/control/Makefile.srcs | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/control/Makefile.srcs b/fpga/usrp3/lib/control/Makefile.srcs new file mode 100644 index 000000000..e0ad8a942 --- /dev/null +++ b/fpga/usrp3/lib/control/Makefile.srcs @@ -0,0 +1,26 @@ +# +# Copyright 2013 Ettus Research LLC +# + +################################################## +# Control Lib Sources +################################################## +CONTROL_LIB_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/control/, \ +reset_sync.v \ +por_gen.v \ +gpio_atr.v \ +simple_spi_core.v \ +simple_i2c_core.v \ +setting_reg.v \ +settings_bus_crossclock.v \ +radio_ctrl_proc.v \ +ram_2port.v \ +axi_crossbar.v \ +axi_slave_mux.v \ +axi_fifo_header.v \ +arb_qualify_master.v \ +axi_forwarding_cam.v \ +axi_test_vfifo.v \ +dram_2port.v \ +cvita_uart.v \ +)) |