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| author | Wade Fife <wade.fife@ettus.com> | 2021-03-02 10:25:57 -0600 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-06-03 11:26:54 -0500 |
| commit | c64258e09b221d0bfeb55e01085a20e37c5b62ba (patch) | |
| tree | 452efc39a225538f19549200a17f8fdd20a7481b /fpga/usrp3/lib/axi4_sv/axi.vh | |
| parent | 7f36cced81fb05d3cc107a0a0773fcdfc26f8d64 (diff) | |
| download | uhd-c64258e09b221d0bfeb55e01085a20e37c5b62ba.tar.gz uhd-c64258e09b221d0bfeb55e01085a20e37c5b62ba.tar.bz2 uhd-c64258e09b221d0bfeb55e01085a20e37c5b62ba.zip | |
fpga: lib: Add clock domain comments to interfaces
Diffstat (limited to 'fpga/usrp3/lib/axi4_sv/axi.vh')
| -rw-r--r-- | fpga/usrp3/lib/axi4_sv/axi.vh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/axi4_sv/axi.vh b/fpga/usrp3/lib/axi4_sv/axi.vh index c2b0c5fd0..bacddff5b 100644 --- a/fpga/usrp3/lib/axi4_sv/axi.vh +++ b/fpga/usrp3/lib/axi4_sv/axi.vh @@ -3,8 +3,9 @@ // // SPDX-License-Identifier: LGPL-3.0-or-later // -// Header File: AxiIf.vh -// Description: Macros for use with AXI4(FULL) +// Header File: axi.vh +// +// Description: Macros for use with AxiIf (AXI4 full) // //----------------------------------------------------------------------------- |