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authorJosh Blum <josh@joshknows.com>2010-08-17 17:52:17 -0700
committerJosh Blum <josh@joshknows.com>2010-08-17 17:52:17 -0700
commitea86054d7203ab4d2b55d88fb22afeeb421f4f9d (patch)
treede7522e955cec723415306e04548f88f0236d830 /fpga/usrp2/vrt
parent6c8260dcb5c73aaef38b7473acc9a332a93c5fa5 (diff)
parent864de41af536de1a4e86aa4542e2cfeb21f2d309 (diff)
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Merge branch 'master' into usrp1
Diffstat (limited to 'fpga/usrp2/vrt')
-rw-r--r--fpga/usrp2/vrt/vita_rx_framer.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/vrt/vita_rx_framer.v b/fpga/usrp2/vrt/vita_rx_framer.v
index fd82263d0..235817941 100644
--- a/fpga/usrp2/vrt/vita_rx_framer.v
+++ b/fpga/usrp2/vrt/vita_rx_framer.v
@@ -128,7 +128,7 @@ module vita_rx_framer
VITA_ERR_SECS : pkt_fifo_line <= {2'b00,vita_time_fifo_o[63:32]};
VITA_ERR_TICS : pkt_fifo_line <= {2'b00,32'd0};
VITA_ERR_TICS2 : pkt_fifo_line <= {2'b00,vita_time_fifo_o[31:0]};
- VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b11,28'd0,flags_fifo_o};
+ VITA_ERR_PAYLOAD : pkt_fifo_line <= {2'b10,28'd0,flags_fifo_o};
//VITA_ERR_TRAILER : pkt_fifo_line <= {2'b11,vita_trailer};
default : pkt_fifo_line <= 34'h0_FFFF_FFFF;