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author | Josh Blum <josh@joshknows.com> | 2010-11-23 09:57:33 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-11-23 09:57:33 -0800 |
commit | d35b7327710f08f96f2cfb93bcc28f14515ea9bb (patch) | |
tree | 0cfe31630905570c776a45746fcb3e2011d3dabd /fpga/usrp2/vrt/gen_context_pkt.v | |
parent | 6741de7b4545bb33d22cc6508e121023dd1a7a8c (diff) | |
parent | 768af46dc01d036999cb60ff16df4215d014c906 (diff) | |
download | uhd-d35b7327710f08f96f2cfb93bcc28f14515ea9bb.tar.gz uhd-d35b7327710f08f96f2cfb93bcc28f14515ea9bb.tar.bz2 uhd-d35b7327710f08f96f2cfb93bcc28f14515ea9bb.zip |
Merge branch 'flow_ctrl' into next
Diffstat (limited to 'fpga/usrp2/vrt/gen_context_pkt.v')
-rw-r--r-- | fpga/usrp2/vrt/gen_context_pkt.v | 38 |
1 files changed, 29 insertions, 9 deletions
diff --git a/fpga/usrp2/vrt/gen_context_pkt.v b/fpga/usrp2/vrt/gen_context_pkt.v index 780a027ba..0eb035f3e 100644 --- a/fpga/usrp2/vrt/gen_context_pkt.v +++ b/fpga/usrp2/vrt/gen_context_pkt.v @@ -7,6 +7,8 @@ module gen_context_pkt input [31:0] streamid, input [63:0] vita_time, input [31:0] message, + input [31:0] seqnum0, + input [31:0] seqnum1, output [35:0] data_o, output src_rdy_o, input dst_rdy_i); localparam CTXT_IDLE = 0; @@ -17,17 +19,32 @@ module gen_context_pkt localparam CTXT_TICS = 5; localparam CTXT_TICS2 = 6; localparam CTXT_MESSAGE = 7; - localparam CTXT_DONE = 8; + localparam CTXT_FLOWCTRL0 = 8; + localparam CTXT_FLOWCTRL1 = 9; + localparam CTXT_DONE = 10; reg [33:0] data_int; wire src_rdy_int, dst_rdy_int; - wire [3:0] seqno = 0; + reg [3:0] seqno; reg [3:0] ctxt_state; reg [63:0] err_time; + reg [31:0] stored_message; always @(posedge clk) if(reset | clear) - ctxt_state <= CTXT_IDLE; + stored_message <= 0; + else + if(trigger) + stored_message <= message; + else if(ctxt_state == CTXT_FLOWCTRL1) + stored_message <= 0; + + always @(posedge clk) + if(reset | clear) + begin + ctxt_state <= CTXT_IDLE; + seqno <= 0; + end else case(ctxt_state) CTXT_IDLE : @@ -41,9 +58,10 @@ module gen_context_pkt end CTXT_DONE : - if(~trigger) - ctxt_state <= CTXT_IDLE; - + begin + ctxt_state <= CTXT_IDLE; + seqno <= seqno + 4'd1; + end default : if(dst_rdy_int) ctxt_state <= ctxt_state + 1; @@ -53,13 +71,15 @@ module gen_context_pkt always @* case(ctxt_state) - CTXT_PROT_ENG : data_int <= { 2'b01, 16'd1, 16'd24 }; - CTXT_HEADER : data_int <= { 1'b0, (PROT_ENG_FLAGS ? 1'b0 : 1'b1), 12'b010100001101, seqno, 16'd6 }; + CTXT_PROT_ENG : data_int <= { 2'b01, 16'd1, 16'd32 }; + CTXT_HEADER : data_int <= { 1'b0, (PROT_ENG_FLAGS ? 1'b0 : 1'b1), 12'b010100001101, seqno, 16'd8 }; CTXT_STREAMID : data_int <= { 2'b00, streamid }; CTXT_SECS : data_int <= { 2'b00, err_time[63:32] }; CTXT_TICS : data_int <= { 2'b00, 32'd0 }; CTXT_TICS2 : data_int <= { 2'b00, err_time[31:0] }; - CTXT_MESSAGE : data_int <= { 2'b10, message }; + CTXT_MESSAGE : data_int <= { 2'b00, message }; + CTXT_FLOWCTRL0 : data_int <= { 2'b00, seqnum0 }; + CTXT_FLOWCTRL1 : data_int <= { 2'b10, seqnum1 }; default : data_int <= {2'b00, 32'b00}; endcase // case (ctxt_state) |