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authorJosh Blum <josh@joshknows.com>2010-04-16 09:42:46 +0000
committerJosh Blum <josh@joshknows.com>2010-04-16 09:42:46 +0000
commit835cb56ef820a69e1e6e0ccde7c5a0e78ca5ad25 (patch)
tree4fe48bdaf92311deedfbe1a5e77dd209468a2d7d /fpga/usrp2/top/u2_rev3_iad/impulse.v
parentf1838b9284a124fcfb5996eaf1647a69b4473278 (diff)
parent067491b58676cbdaa754334949a8ffc2daf32979 (diff)
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Merge branch 'master' of git@ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
Conflicts: .gitignore
Diffstat (limited to 'fpga/usrp2/top/u2_rev3_iad/impulse.v')
-rw-r--r--fpga/usrp2/top/u2_rev3_iad/impulse.v63
1 files changed, 63 insertions, 0 deletions
diff --git a/fpga/usrp2/top/u2_rev3_iad/impulse.v b/fpga/usrp2/top/u2_rev3_iad/impulse.v
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index 000000000..7f0cdc9be
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+++ b/fpga/usrp2/top/u2_rev3_iad/impulse.v
@@ -0,0 +1,63 @@
+module impulse
+ (input clk,
+ input rst,
+ input ena,
+
+ input [13:0] dc_offset_a,
+ input [13:0] dc_offset_b,
+ input [13:0] amplitude,
+ input [15:0] impulse_len,
+ input [15:0] zero_len,
+
+ output [13:0] adc_a,
+ output [13:0] adc_b,
+ output adc_ovf_a,
+ output adc_ovf_b
+ );
+
+ reg [13:0] adc_a_int = 0;
+ reg [15:0] count;
+
+ localparam ST_ZERO = 0;
+ localparam ST_HIGH = 1;
+ reg state;
+
+ always @(posedge clk)
+ if (rst | ~ena)
+ begin
+ adc_a_int <= 0;
+ count <= 0;
+ state <= ST_ZERO;
+ end
+ else
+ case(state)
+ ST_ZERO:
+ if (count == zero_len)
+ begin
+ adc_a_int <= amplitude;
+ state <= ST_HIGH;
+ count <= 0;
+ end
+ else
+ count <= count + 1;
+
+ ST_HIGH:
+ if (count == impulse_len)
+ begin
+ adc_a_int <= 0;
+ state <= ST_ZERO;
+ count <= 0;
+ end
+ else
+ count <= count + 1;
+
+ endcase // case (state)
+
+ assign adc_a = adc_a_int + dc_offset_a;
+
+ // Ignore for now
+ assign adc_b = dc_offset_b;
+ assign adc_ovf_a = 0;
+ assign adc_ovf_b = 0;
+
+endmodule // impulse