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authorJosh Blum <josh@joshknows.com>2010-11-23 13:50:37 -0800
committerJosh Blum <josh@joshknows.com>2010-11-23 13:50:37 -0800
commit30ce5acedd3e0dc6fc97d7597781a0a4828812f2 (patch)
tree28d010c0938121f587e1820849c34ee900e7f74b /fpga/usrp2/top/u1e_passthru/passthru.v
parent8ce75a3ca7a51f4bdee87d78a610a0f2519473ae (diff)
parent13ae4786e091d5581baf31c9967dca822ef15e39 (diff)
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Merge branch 'usrp_e100' into next
Conflicts: images/Makefile
Diffstat (limited to 'fpga/usrp2/top/u1e_passthru/passthru.v')
-rw-r--r--fpga/usrp2/top/u1e_passthru/passthru.v18
1 files changed, 18 insertions, 0 deletions
diff --git a/fpga/usrp2/top/u1e_passthru/passthru.v b/fpga/usrp2/top/u1e_passthru/passthru.v
new file mode 100644
index 000000000..12e4db017
--- /dev/null
+++ b/fpga/usrp2/top/u1e_passthru/passthru.v
@@ -0,0 +1,18 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+
+module passthru
+ (input overo_gpio145,
+ output cgen_sclk,
+ output cgen_sen_b,
+ output cgen_mosi,
+ input fpga_cfg_din,
+ input fpga_cfg_cclk
+ );
+
+ assign cgen_sclk = fpga_cfg_cclk;
+ assign cgen_sen_b = overo_gpio145;
+ assign cgen_mosi = fpga_cfg_din;
+
+
+endmodule // passthru