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author | Josh Blum <josh@joshknows.com> | 2010-11-23 13:36:42 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-11-23 13:36:42 -0800 |
commit | bb0572a960edf54486a4be746c681adaac0fa398 (patch) | |
tree | 7afb46e99eaf799a478fcde841eb78d7698e9c39 /fpga/usrp2/top/safe_u2plus/safe_u2plus.v | |
parent | 8ce75a3ca7a51f4bdee87d78a610a0f2519473ae (diff) | |
download | uhd-bb0572a960edf54486a4be746c681adaac0fa398.tar.gz uhd-bb0572a960edf54486a4be746c681adaac0fa398.tar.bz2 uhd-bb0572a960edf54486a4be746c681adaac0fa398.zip |
fpga: performed a forceful checkout of fpga to overwrite with current fpga code
Diffstat (limited to 'fpga/usrp2/top/safe_u2plus/safe_u2plus.v')
-rw-r--r-- | fpga/usrp2/top/safe_u2plus/safe_u2plus.v | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/fpga/usrp2/top/safe_u2plus/safe_u2plus.v b/fpga/usrp2/top/safe_u2plus/safe_u2plus.v new file mode 100644 index 000000000..dca9688c5 --- /dev/null +++ b/fpga/usrp2/top/safe_u2plus/safe_u2plus.v @@ -0,0 +1,23 @@ +`timescale 1ns / 1ps +////////////////////////////////////////////////////////////////////////////////// + +module safe_u2plus + ( + input CLK_FPGA_P, input CLK_FPGA_N, // Diff + output [5:1] leds, // LED4 is shared w/INIT_B + output ETH_LED + ); + + wire clk_fpga; + + IBUFGDS clk_fpga_pin (.O(clk_fpga),.I(CLK_FPGA_P),.IB(CLK_FPGA_N)); + defparam clk_fpga_pin.IOSTANDARD = "LVPECL_25"; + + reg [31:0] ctr; + + always @(posedge clk_fpga) + ctr <= ctr + 1; + + assign {leds,ETH_LED} = ~ctr[29:24]; + +endmodule // safe_u2plus |