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authorJosh Blum <josh@joshknows.com>2011-07-19 14:18:58 -0700
committerJosh Blum <josh@joshknows.com>2011-07-19 14:18:58 -0700
commit07c2e795b2d3fbf77d548e902c558d810c76156d (patch)
treea5a5f8536025d2ec97d697c9f528f07902aedefe /fpga/usrp2/top/N2x0
parent64382c4c8626e429f91865ab27c9e0a69da5edf3 (diff)
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fpga: squashed new_work fpga changes onto uhd next
Diffstat (limited to 'fpga/usrp2/top/N2x0')
-rw-r--r--fpga/usrp2/top/N2x0/Makefile.N200R31
-rw-r--r--fpga/usrp2/top/N2x0/Makefile.N200R41
-rw-r--r--fpga/usrp2/top/N2x0/Makefile.N210R31
-rw-r--r--fpga/usrp2/top/N2x0/Makefile.N210R41
4 files changed, 4 insertions, 0 deletions
diff --git a/fpga/usrp2/top/N2x0/Makefile.N200R3 b/fpga/usrp2/top/N2x0/Makefile.N200R3
index a525836ed..9ed5ece00 100644
--- a/fpga/usrp2/top/N2x0/Makefile.N200R3
+++ b/fpga/usrp2/top/N2x0/Makefile.N200R3
@@ -71,6 +71,7 @@ TRANSLATE_PROPERTIES = \
"Macro Search Path" "$(shell pwd)/../../coregen/"
MAP_PROPERTIES = \
+"Generate Detailed MAP Report" TRUE \
"Allow Logic Optimization Across Hierarchy" TRUE \
"Map to Input Functions" 4 \
"Optimization Strategy (Cover Mode)" Speed \
diff --git a/fpga/usrp2/top/N2x0/Makefile.N200R4 b/fpga/usrp2/top/N2x0/Makefile.N200R4
index 0ca40e1bd..f8640224f 100644
--- a/fpga/usrp2/top/N2x0/Makefile.N200R4
+++ b/fpga/usrp2/top/N2x0/Makefile.N200R4
@@ -73,6 +73,7 @@ TRANSLATE_PROPERTIES = \
"Macro Search Path" "$(shell pwd)/../../coregen/"
MAP_PROPERTIES = \
+"Generate Detailed MAP Report" TRUE \
"Allow Logic Optimization Across Hierarchy" TRUE \
"Map to Input Functions" 4 \
"Optimization Strategy (Cover Mode)" Speed \
diff --git a/fpga/usrp2/top/N2x0/Makefile.N210R3 b/fpga/usrp2/top/N2x0/Makefile.N210R3
index e29251e1c..2937dc409 100644
--- a/fpga/usrp2/top/N2x0/Makefile.N210R3
+++ b/fpga/usrp2/top/N2x0/Makefile.N210R3
@@ -71,6 +71,7 @@ TRANSLATE_PROPERTIES = \
"Macro Search Path" "$(shell pwd)/../../coregen/"
MAP_PROPERTIES = \
+"Generate Detailed MAP Report" TRUE \
"Allow Logic Optimization Across Hierarchy" TRUE \
"Map to Input Functions" 4 \
"Optimization Strategy (Cover Mode)" Speed \
diff --git a/fpga/usrp2/top/N2x0/Makefile.N210R4 b/fpga/usrp2/top/N2x0/Makefile.N210R4
index 01a9e19fd..39a2508f9 100644
--- a/fpga/usrp2/top/N2x0/Makefile.N210R4
+++ b/fpga/usrp2/top/N2x0/Makefile.N210R4
@@ -73,6 +73,7 @@ TRANSLATE_PROPERTIES = \
"Macro Search Path" "$(shell pwd)/../../coregen/"
MAP_PROPERTIES = \
+"Generate Detailed MAP Report" TRUE \
"Allow Logic Optimization Across Hierarchy" TRUE \
"Map to Input Functions" 4 \
"Optimization Strategy (Cover Mode)" Speed \