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authorJosh Blum <josh@joshknows.com>2011-08-15 18:55:57 -0700
committerJosh Blum <josh@joshknows.com>2011-08-15 18:55:57 -0700
commit06dc097530730621515863b40411581e1d3422b7 (patch)
treee0fab8d37bc75c16a079647eb2bf58fe072dddfb /fpga/usrp2/top/N2x0
parent26a75aca7c7408dbb9c34d68761b043434e1d13b (diff)
parentccafda72b4d1acf820be26e488bbfc530ca31c65 (diff)
downloaduhd-release_003_002_002.tar.gz
uhd-release_003_002_002.tar.bz2
uhd-release_003_002_002.zip
Merge branch 'fpga_patch_release' into patch_releaserelease_003_002_002
Diffstat (limited to 'fpga/usrp2/top/N2x0')
-rw-r--r--fpga/usrp2/top/N2x0/Makefile23
-rw-r--r--fpga/usrp2/top/N2x0/u2plus.v8
-rw-r--r--fpga/usrp2/top/N2x0/u2plus_core.v2
3 files changed, 29 insertions, 4 deletions
diff --git a/fpga/usrp2/top/N2x0/Makefile b/fpga/usrp2/top/N2x0/Makefile
new file mode 100644
index 000000000..b6a3d9624
--- /dev/null
+++ b/fpga/usrp2/top/N2x0/Makefile
@@ -0,0 +1,23 @@
+#
+# Copyright 2011 Ettus Research LLC
+#
+
+all: N200R3 N210R3 N200R4 N210R4
+ find -name "*.twr" | xargs grep constraint | grep met
+
+clean:
+ rm -rf build*
+
+N200R3:
+ make -f Makefile.$@ bin
+
+N210R3:
+ make -f Makefile.$@ bin
+
+N200R4:
+ make -f Makefile.$@ bin
+
+N210R4:
+ make -f Makefile.$@ bin
+
+.PHONY: all clean
diff --git a/fpga/usrp2/top/N2x0/u2plus.v b/fpga/usrp2/top/N2x0/u2plus.v
index be6cdeeca..be1f355d2 100644
--- a/fpga/usrp2/top/N2x0/u2plus.v
+++ b/fpga/usrp2/top/N2x0/u2plus.v
@@ -188,13 +188,15 @@ module u2plus
.out({adc_a_inv,adc_b}));
assign adc_a = ~adc_a_inv;
`else
- reg [13:0] adc_a, adc_b;
+ reg [13:0] adc_a, adc_b, adc_a_pre, adc_b_pre;
always @(posedge dsp_clk)
begin
- adc_a <= ~{ADCA_12_p,ADCA_12_n, ADCA_10_p,ADCA_10_n, ADCA_8_p,ADCA_8_n, ADCA_6_p,ADCA_6_n,
+ adc_a_pre <= {ADCA_12_p,ADCA_12_n, ADCA_10_p,ADCA_10_n, ADCA_8_p,ADCA_8_n, ADCA_6_p,ADCA_6_n,
ADCA_4_p,ADCA_4_n, ADCA_2_p,ADCA_2_n, ADCA_0_p,ADCA_0_n };
- adc_b <= {ADCB_12_p,ADCB_12_n, ADCB_10_p,ADCB_10_n, ADCB_8_p,ADCB_8_n, ADCB_6_p,ADCB_6_n,
+ adc_b_pre <= {ADCB_12_p,ADCB_12_n, ADCB_10_p,ADCB_10_n, ADCB_8_p,ADCB_8_n, ADCB_6_p,ADCB_6_n,
ADCB_4_p,ADCB_4_n, ADCB_2_p,ADCB_2_n, ADCB_0_p,ADCB_0_n };
+ adc_a <= ~adc_a_pre; //Note: A must be inverted, but not B
+ adc_b <= adc_b_pre;
end
`endif // !`ifdef LVDS
diff --git a/fpga/usrp2/top/N2x0/u2plus_core.v b/fpga/usrp2/top/N2x0/u2plus_core.v
index f01306f97..9906daa5f 100644
--- a/fpga/usrp2/top/N2x0/u2plus_core.v
+++ b/fpga/usrp2/top/N2x0/u2plus_core.v
@@ -427,7 +427,7 @@ module u2plus_core
// Buffer Pool Status -- Slave #5
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd7, 16'd1}; //major, minor
+ localparam compat_num = {16'd7, 16'd2}; //major, minor
wb_readback_mux buff_pool_status
(.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb),