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authorJosh Blum <josh@joshknows.com>2012-05-10 20:45:22 -0700
committerJosh Blum <josh@joshknows.com>2012-05-10 20:45:22 -0700
commitdddda9d5f31481c5966d13d0f12829722033d1d3 (patch)
tree13eba1378106d6d94627bf20bb4371ca5a087dbf /fpga/usrp2/top/E1x0
parent926ee6316d768f72191e5abffc5c0e2074e0bbe7 (diff)
parent9786c2bd7ba90f8a5abe29b19ba69a30f153f1b4 (diff)
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Merge branch 'fpga_master'
Diffstat (limited to 'fpga/usrp2/top/E1x0')
-rw-r--r--fpga/usrp2/top/E1x0/u1e_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/top/E1x0/u1e_core.v b/fpga/usrp2/top/E1x0/u1e_core.v
index d4af8c0df..77be1bfb0 100644
--- a/fpga/usrp2/top/E1x0/u1e_core.v
+++ b/fpga/usrp2/top/E1x0/u1e_core.v
@@ -454,7 +454,7 @@ module u1e_core
// Readback mux 32 -- Slave #7
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd10, 16'd0}; //major, minor
+ localparam compat_num = {16'd10, 16'd1}; //major, minor
wire [31:0] reg_test32;