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authorJosh Blum <josh@joshknows.com>2012-07-16 20:41:18 -0700
committerJosh Blum <josh@joshknows.com>2012-07-16 20:41:18 -0700
commit9d30b8fc24dc7efa8973a4d305b240c245133fe6 (patch)
treee5488d3d0d8e489cea4bc97f81375e5b9a88e771 /fpga/usrp2/top/E1x0
parentbb2fbec27b2dc7d199119ca952ae2a431cbbbb15 (diff)
parentb6bb13bcbab932d54f0502f885a9db8ca906eb5f (diff)
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Merge branch 'master' into next
Diffstat (limited to 'fpga/usrp2/top/E1x0')
-rw-r--r--fpga/usrp2/top/E1x0/u1e_core.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/top/E1x0/u1e_core.v b/fpga/usrp2/top/E1x0/u1e_core.v
index 77be1bfb0..fef988e62 100644
--- a/fpga/usrp2/top/E1x0/u1e_core.v
+++ b/fpga/usrp2/top/E1x0/u1e_core.v
@@ -454,7 +454,7 @@ module u1e_core
// Readback mux 32 -- Slave #7
//compatibility number -> increment when the fpga has been sufficiently altered
- localparam compat_num = {16'd10, 16'd1}; //major, minor
+ localparam compat_num = {16'd10, 16'd2}; //major, minor
wire [31:0] reg_test32;