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author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
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committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp2/top/E1x0/make.sim | |
parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp2/top/E1x0/make.sim')
-rw-r--r-- | fpga/usrp2/top/E1x0/make.sim | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/fpga/usrp2/top/E1x0/make.sim b/fpga/usrp2/top/E1x0/make.sim deleted file mode 100644 index 1c163884c..000000000 --- a/fpga/usrp2/top/E1x0/make.sim +++ /dev/null @@ -1,7 +0,0 @@ -all: sim - -sim: - iverilog -Wimplicit -Wportbind -c cmdfile tb_u1e.v -o tb_u1e - -clean: - rm -f tb_u1e *.vcd *.lxt a.out |