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author | Josh Blum <josh@joshknows.com> | 2011-10-12 10:14:42 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-10-12 10:14:42 -0700 |
commit | 5f2ed309ab506adb61472b7c15fe2fe4b90cfcbb (patch) | |
tree | 73b54bf456e449028b68b86c233fbbd7dcdb3323 /fpga/usrp2/top/B100 | |
parent | 5fcad09af2048d8babdcbddc310b069684160697 (diff) | |
parent | 2849b0912bf251cfd1c0d9e89d39870ca54bef00 (diff) | |
download | uhd-5f2ed309ab506adb61472b7c15fe2fe4b90cfcbb.tar.gz uhd-5f2ed309ab506adb61472b7c15fe2fe4b90cfcbb.tar.bz2 uhd-5f2ed309ab506adb61472b7c15fe2fe4b90cfcbb.zip |
Merge branch 'fpga_master' into uhd_master
Diffstat (limited to 'fpga/usrp2/top/B100')
-rw-r--r-- | fpga/usrp2/top/B100/u1plus_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/top/B100/u1plus_core.v b/fpga/usrp2/top/B100/u1plus_core.v index 61c1df04c..e11a4c37e 100644 --- a/fpga/usrp2/top/B100/u1plus_core.v +++ b/fpga/usrp2/top/B100/u1plus_core.v @@ -341,7 +341,7 @@ module u1plus_core assign test_rate = xfer_rate[7:0]; assign test_len = reg_test[15:0]; - assign { debug_led[2],debug_led[0],debug_led[1] } = reg_leds; // LEDs are arranged funny on board + assign debug_led = {run_tx, (run_rx0 | run_rx1), cgen_st_ld}; assign { cgen_sync_b, cgen_ref_sel } = reg_cgen_ctrl; assign s0_dat_miso = (s0_adr[6:0] == REG_LEDS) ? reg_leds : |