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| author | Josh Blum <josh@joshknows.com> | 2013-09-04 14:35:22 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2013-09-04 14:35:22 -0700 |
| commit | 91b5557527896998b395f4683914c4bfecad1f8e (patch) | |
| tree | 1817747cc4c63a049bc95b4d2c5cb8b173d7f6ef /fpga/usrp2/top/B100/u1plus_core.v | |
| parent | 8814558fcad1e1425d929035a651ab51aad05994 (diff) | |
| parent | 8c1b63e1949134ec476b5b43e1caca42ffe017d5 (diff) | |
| download | uhd-91b5557527896998b395f4683914c4bfecad1f8e.tar.gz uhd-91b5557527896998b395f4683914c4bfecad1f8e.tar.bz2 uhd-91b5557527896998b395f4683914c4bfecad1f8e.zip | |
Merge branch 'master_converter_work'
Diffstat (limited to 'fpga/usrp2/top/B100/u1plus_core.v')
| -rw-r--r-- | fpga/usrp2/top/B100/u1plus_core.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga/usrp2/top/B100/u1plus_core.v b/fpga/usrp2/top/B100/u1plus_core.v index 9fe09c60e..7f137f0d1 100644 --- a/fpga/usrp2/top/B100/u1plus_core.v +++ b/fpga/usrp2/top/B100/u1plus_core.v @@ -1,5 +1,5 @@ // -// Copyright 2011-2012 Ettus Research LLC +// Copyright 2011-2013 Ettus Research LLC // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by @@ -71,7 +71,7 @@ module u1plus_core localparam SR_GPIO = 224; // 5 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd11, 16'd3}; //major, minor + localparam compat_num = {16'd11, 16'd4}; //major, minor //assign run signals used for ATR logic wire [NUM_RX_DSPS-1:0] run_rx_n; |