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| author | Josh Blum <josh@joshknows.com> | 2013-08-28 17:19:40 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2013-08-28 17:19:40 -0700 |
| commit | 528f2ec3028ec735fe4be39a1087c77068c61860 (patch) | |
| tree | f4bc94dc9e7bf988882a7286a4cfe9d0a934ebd8 /fpga/usrp2/top/B100/u1plus_core.v | |
| parent | 2d4c77489f540a6978497d25dd3e316a2f16e9ad (diff) | |
| parent | 714673c7437fcd863d2bfdb8b20689d6a6d0f577 (diff) | |
| download | uhd-528f2ec3028ec735fe4be39a1087c77068c61860.tar.gz uhd-528f2ec3028ec735fe4be39a1087c77068c61860.tar.bz2 uhd-528f2ec3028ec735fe4be39a1087c77068c61860.zip | |
Merge branch 'fpga_master' into master_converter_work
Diffstat (limited to 'fpga/usrp2/top/B100/u1plus_core.v')
| -rw-r--r-- | fpga/usrp2/top/B100/u1plus_core.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga/usrp2/top/B100/u1plus_core.v b/fpga/usrp2/top/B100/u1plus_core.v index 9fe09c60e..7f137f0d1 100644 --- a/fpga/usrp2/top/B100/u1plus_core.v +++ b/fpga/usrp2/top/B100/u1plus_core.v @@ -1,5 +1,5 @@ // -// Copyright 2011-2012 Ettus Research LLC +// Copyright 2011-2013 Ettus Research LLC // // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by @@ -71,7 +71,7 @@ module u1plus_core localparam SR_GPIO = 224; // 5 //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = {16'd11, 16'd3}; //major, minor + localparam compat_num = {16'd11, 16'd4}; //major, minor //assign run signals used for ATR logic wire [NUM_RX_DSPS-1:0] run_rx_n; |