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authorMartin Braun <martin.braun@ettus.com>2014-10-07 11:25:20 +0200
committerMartin Braun <martin.braun@ettus.com>2014-10-07 11:25:20 +0200
commitfd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch)
tree3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp2/timing/Makefile.srcs
parent3b66804e41891e358c790b453a7a59ec7462dba4 (diff)
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Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp2/timing/Makefile.srcs')
-rw-r--r--fpga/usrp2/timing/Makefile.srcs16
1 files changed, 0 insertions, 16 deletions
diff --git a/fpga/usrp2/timing/Makefile.srcs b/fpga/usrp2/timing/Makefile.srcs
deleted file mode 100644
index 0cf9372d3..000000000
--- a/fpga/usrp2/timing/Makefile.srcs
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Copyright 2010 Ettus Research LLC
-#
-
-##################################################
-# Timing Sources
-##################################################
-TIMING_SRCS = $(abspath $(addprefix $(BASE_DIR)/../timing/, \
-time_64bit.v \
-time_compare.v \
-time_receiver.v \
-time_sender.v \
-time_sync.v \
-timer.v \
-simple_timer.v \
-))