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author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
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committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp2/testbench/Makefile | |
parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp2/testbench/Makefile')
-rw-r--r-- | fpga/usrp2/testbench/Makefile | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/fpga/usrp2/testbench/Makefile b/fpga/usrp2/testbench/Makefile deleted file mode 100644 index 6032a0123..000000000 --- a/fpga/usrp2/testbench/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -all: single dual - -single: - iverilog -Wimplicit -Wportbind -c cmdfile ../top/single_u2_sim/single_u2_sim.v -o single_u2_sim - -dual: - iverilog -Wimplicit -Wportbind -c cmdfile ../top/dual_u2_sim/dual_u2_sim.v -o dual_u2_sim - -clean: - rm -f single_u2_sim dual_u2_sim *.vcd *.lxt |