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authorJosh Blum <josh@joshknows.com>2010-04-15 11:24:41 -0700
committerJosh Blum <josh@joshknows.com>2010-04-15 11:24:41 -0700
commit3a196c5d614fbec9b1010b3082245614ba5e0dc9 (patch)
tree784f075298f5d86c9e7429ce0ff977deaf4315c8 /fpga/usrp2/sdr_lib/hb/acc.v
parentcbf7a0916f0455743d8446a8edc0f0775e3e63ed (diff)
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Merge branch 'udp'
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1 files changed, 22 insertions, 0 deletions
diff --git a/fpga/usrp2/sdr_lib/hb/acc.v b/fpga/usrp2/sdr_lib/hb/acc.v
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+
+
+module acc (input clock, input reset, input clear, input enable_in, output reg enable_out,
+ input signed [30:0] addend, output reg signed [33:0] sum );
+
+ always @(posedge clock)
+ if(reset)
+ sum <= #1 34'd0;
+ //else if(clear & enable_in)
+ // sum <= #1 addend;
+ //else if(clear)
+ // sum <= #1 34'd0;
+ else if(clear)
+ sum <= #1 addend;
+ else if(enable_in)
+ sum <= #1 sum + addend;
+
+ always @(posedge clock)
+ enable_out <= #1 enable_in;
+
+endmodule // acc
+