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| author | Josh Blum <josh@joshknows.com> | 2011-08-15 18:55:57 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-08-15 18:55:57 -0700 |
| commit | 06dc097530730621515863b40411581e1d3422b7 (patch) | |
| tree | e0fab8d37bc75c16a079647eb2bf58fe072dddfb /fpga/usrp2/sdr_lib/cic_decim.v | |
| parent | 26a75aca7c7408dbb9c34d68761b043434e1d13b (diff) | |
| parent | ccafda72b4d1acf820be26e488bbfc530ca31c65 (diff) | |
| download | uhd-release_003_002_002.tar.gz uhd-release_003_002_002.tar.bz2 uhd-release_003_002_002.zip | |
Merge branch 'fpga_patch_release' into patch_releaserelease_003_002_002
Diffstat (limited to 'fpga/usrp2/sdr_lib/cic_decim.v')
| -rwxr-xr-x | fpga/usrp2/sdr_lib/cic_decim.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/fpga/usrp2/sdr_lib/cic_decim.v b/fpga/usrp2/sdr_lib/cic_decim.v index 9a03081b0..e6b6e9590 100755 --- a/fpga/usrp2/sdr_lib/cic_decim.v +++ b/fpga/usrp2/sdr_lib/cic_decim.v @@ -45,10 +45,10 @@ module cic_decim ext_input (.in(signal_in),.out(signal_in_ext)); always @(posedge clock) - if(reset) + if(~enable) for(i=0;i<N;i=i+1) integrator[i] <= 0; - else if (enable && strobe_in) + else if (strobe_in) begin integrator[0] <= integrator[0] + signal_in_ext; for(i=1;i<N;i=i+1) @@ -56,7 +56,7 @@ module cic_decim end always @(posedge clock) - if(reset) + if(~enable) begin sampler <= 0; for(i=0;i<N;i=i+1) @@ -65,7 +65,7 @@ module cic_decim differentiator[i] <= 0; end end - else if (enable && strobe_out) + else if (strobe_out) begin sampler <= integrator[N-1]; differentiator[0] <= sampler; |