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authorJosh Blum <josh@joshknows.com>2011-03-17 13:53:48 -0700
committerJosh Blum <josh@joshknows.com>2011-03-17 13:53:48 -0700
commitee424d797fc37a8c3c2a82a58218bf1e85456226 (patch)
tree74b179d55122df0a156f82ef25dd42895bb52487 /fpga/usrp2/opencores/zpu/wishbone
parentb52877b3d9af48ecde6f5378755e8c2337a41921 (diff)
parentbe2c1b95c1d6f4ad2ea663bb926a04463edb9358 (diff)
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Merge branch 'fpga_memory_reorg' into usrp2/new_reg_map
Diffstat (limited to 'fpga/usrp2/opencores/zpu/wishbone')
-rw-r--r--fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd3
1 files changed, 1 insertions, 2 deletions
diff --git a/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd b/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd
index 8af678b6a..294651fe2 100644
--- a/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd
+++ b/fpga/usrp2/opencores/zpu/wishbone/zpu_system.vhd
@@ -51,7 +51,7 @@ entity zpu_system is
-- ZPU Control signals
enable : in std_logic;
interrupt : in std_logic;
- stack_start : in std_logic_vector(maxAddrBitIncIO downto 0);
+
zpu_status : out std_logic_vector(63 downto 0);
-- wishbone interfaces
@@ -84,7 +84,6 @@ begin
mem_write => mem_write,
out_mem_addr => out_mem_addr,
mem_writeMask => mem_writeMask,
- stack_start => stack_start,
interrupt => interrupt,
zpu_status => zpu_status,
break => open);