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authorJosh Blum <josh@joshknows.com>2010-06-15 18:24:33 -0700
committerJosh Blum <josh@joshknows.com>2010-06-15 18:24:33 -0700
commitedcc2df10ba59ed91ac9513c2dc1d36e155caaec (patch)
tree1a1ec2c0b5500990c991c27af03dbe48c10ce7ca /fpga/usrp2/opencores/i2c/sim
parenta89d684ba2b81c6e18d348965dffb919edb56fea (diff)
parent9445315e6a5cdfb29c4ead73b0fcd4d5fd75b900 (diff)
downloaduhd-edcc2df10ba59ed91ac9513c2dc1d36e155caaec.tar.gz
uhd-edcc2df10ba59ed91ac9513c2dc1d36e155caaec.tar.bz2
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Merge branch 'master' of ettus.sourcerepo.com:ettus/fpga into uhd_master
Conflicts: fpga/.gitignore
Diffstat (limited to 'fpga/usrp2/opencores/i2c/sim')
-rw-r--r--fpga/usrp2/opencores/i2c/sim/CVS/Entries1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/CVS/Repository1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/CVS/Root1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/CVS/Template0
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template0
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries6
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template0
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template0
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root1
-rw-r--r--fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template0
20 files changed, 0 insertions, 20 deletions
diff --git a/fpga/usrp2/opencores/i2c/sim/CVS/Entries b/fpga/usrp2/opencores/i2c/sim/CVS/Entries
deleted file mode 100644
index d08a896a5..000000000
--- a/fpga/usrp2/opencores/i2c/sim/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D/i2c_verilog////
diff --git a/fpga/usrp2/opencores/i2c/sim/CVS/Repository b/fpga/usrp2/opencores/i2c/sim/CVS/Repository
deleted file mode 100644
index 500d85906..000000000
--- a/fpga/usrp2/opencores/i2c/sim/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim
diff --git a/fpga/usrp2/opencores/i2c/sim/CVS/Root b/fpga/usrp2/opencores/i2c/sim/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/fpga/usrp2/opencores/i2c/sim/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/fpga/usrp2/opencores/i2c/sim/CVS/Template b/fpga/usrp2/opencores/i2c/sim/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/fpga/usrp2/opencores/i2c/sim/CVS/Template
+++ /dev/null
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries
deleted file mode 100644
index 8ab9f73a7..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D/run////
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository
deleted file mode 100644
index b97ee33c8..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template
+++ /dev/null
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries
deleted file mode 100644
index ddea0baae..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries
+++ /dev/null
@@ -1,6 +0,0 @@
-/bench.vcd/1.1/Sat Jun 15 07:37:05 2002//
-/ncverilog.key/1.1/Sat Jun 15 07:37:11 2002//
-/ncverilog.log/1.1/Sat Jun 15 07:37:11 2002//
-/run/1.2/Fri Apr 6 09:02:38 2007//
-D/INCA_libs////
-D/waves////
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository
deleted file mode 100644
index bdd990e7c..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog/run
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template
+++ /dev/null
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries
deleted file mode 100644
index 178481050..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository
deleted file mode 100644
index 6b760e397..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog/run/INCA_libs
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template
+++ /dev/null
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries
deleted file mode 100644
index 178481050..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository
deleted file mode 100644
index 94d106eb0..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog/run/waves
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template b/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/fpga/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template
+++ /dev/null