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author | Josh Blum <josh@joshknows.com> | 2010-06-15 18:24:33 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-06-15 18:24:33 -0700 |
commit | edcc2df10ba59ed91ac9513c2dc1d36e155caaec (patch) | |
tree | 1a1ec2c0b5500990c991c27af03dbe48c10ce7ca /fpga/usrp2/fifo/ll8_shortfifo.v | |
parent | a89d684ba2b81c6e18d348965dffb919edb56fea (diff) | |
parent | 9445315e6a5cdfb29c4ead73b0fcd4d5fd75b900 (diff) | |
download | uhd-edcc2df10ba59ed91ac9513c2dc1d36e155caaec.tar.gz uhd-edcc2df10ba59ed91ac9513c2dc1d36e155caaec.tar.bz2 uhd-edcc2df10ba59ed91ac9513c2dc1d36e155caaec.zip |
Merge branch 'master' of ettus.sourcerepo.com:ettus/fpga into uhd_master
Conflicts:
fpga/.gitignore
Diffstat (limited to 'fpga/usrp2/fifo/ll8_shortfifo.v')
-rw-r--r-- | fpga/usrp2/fifo/ll8_shortfifo.v | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/fpga/usrp2/fifo/ll8_shortfifo.v b/fpga/usrp2/fifo/ll8_shortfifo.v new file mode 100644 index 000000000..39ada9a4f --- /dev/null +++ b/fpga/usrp2/fifo/ll8_shortfifo.v @@ -0,0 +1,13 @@ + + +module ll8_shortfifo + (input clk, input reset, input clear, + input [7:0] datain, input sof_i, input eof_i, input error_i, input src_rdy_i, output dst_rdy_o, + output [7:0] dataout, output sof_o, output eof_o, output error_o, output src_rdy_o, input dst_rdy_i); + + fifo_short #(.WIDTH(11)) fifo_short + (.clk(clk), .reset(reset), .clear(clear), + .datain({error_i,eof_i,sof_i,datain}), .src_rdy_i(src_rdy_i), .dst_rdy_o(dst_rdy_o), + .dataout({error_o,eof_o,sof_o,dataout}), .src_rdy_o(src_rdy_o), .dst_rdy_i(dst_rdy_i)); + +endmodule // ll8_shortfifo |