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authorJosh Blum <josh@joshknows.com>2010-11-23 13:53:14 -0800
committerJosh Blum <josh@joshknows.com>2010-11-23 13:53:14 -0800
commit18ce33d2286a428705bc19e5dc091f2d6a6d4d5b (patch)
treec355fbde9d8804b29ab76bef7412874fe03955a1 /fpga/usrp2/coregen/coregen.cgp
parent30ce5acedd3e0dc6fc97d7597781a0a4828812f2 (diff)
parent74bb6b39d9a677e6a7a41b6e3d62488aa265f706 (diff)
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Merge branch 'fpga_next' into next
Conflicts: fpga/usrp2/top/u1e_passthru/.gitignore fpga/usrp2/top/u1e_passthru/Makefile fpga/usrp2/top/u2plus/.gitignore fpga/usrp2/top/u2plus/Makefile usrp2/top/u1e_passthru/.gitignore usrp2/top/u1e_passthru/Makefile
Diffstat (limited to 'fpga/usrp2/coregen/coregen.cgp')
-rw-r--r--fpga/usrp2/coregen/coregen.cgp6
1 files changed, 3 insertions, 3 deletions
diff --git a/fpga/usrp2/coregen/coregen.cgp b/fpga/usrp2/coregen/coregen.cgp
index 4c9201aff..dd85a7f50 100644
--- a/fpga/usrp2/coregen/coregen.cgp
+++ b/fpga/usrp2/coregen/coregen.cgp
@@ -1,4 +1,4 @@
-# Date: Mon Jul 26 21:55:33 2010
+# Date: Fri Oct 15 07:50:19 2010
SET addpads = false
SET asysymbol = false
@@ -13,10 +13,10 @@ SET foundationsym = false
SET implementationfiletype = Ngc
SET package = fg456
SET removerpms = false
-SET simulationfiles = Behavioral
+SET simulationfiles = Structural
SET speedgrade = -5
SET verilogsim = true
SET vhdlsim = false
SET workingdirectory = /tmp/
-# CRC: 394da717
+# CRC: 983b9b45