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| author | Josh Blum <josh@joshknows.com> | 2010-11-23 15:35:48 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-11-23 15:35:48 -0800 |
| commit | f56c1247cbe7b7e90acee2711b5dda3356b9486a (patch) | |
| tree | 81dadc83537c2c50550cd94e224571e472176c6f /fpga/usrp2/coregen/_xmsgs | |
| parent | 9f94ef843ceca63bcb83b2d473cbba709c9110b6 (diff) | |
| parent | eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 (diff) | |
| download | uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.tar.gz uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.tar.bz2 uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.zip | |
Merge branch 'next' of ettus.sourcerepo.com:ettus/uhdpriv into next
Diffstat (limited to 'fpga/usrp2/coregen/_xmsgs')
| -rw-r--r-- | fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs new file mode 100644 index 000000000..d946af064 --- /dev/null +++ b/fpga/usrp2/coregen/_xmsgs/pn_parser.xmsgs @@ -0,0 +1,15 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- IMPORTANT: This is an internal file that has been generated --> +<!-- by the Xilinx ISE software. Any direct editing or --> +<!-- changes made to this file may result in unpredictable --> +<!-- behavior or data corruption. It is strongly advised that --> +<!-- users do not edit the contents of this file. --> +<!-- --> +<!-- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. --> + +<messages> +<msg type="info" file="ProjectMgmt" num="1062" ><arg fmt="%s" index="1">Parsing Verilog file "/home/jblum/uhdpriv/fpga/usrp2/coregen/fifo_xlnx_512x36_2clk_prog_full.v" into library work</arg> +</msg> + +</messages> + |