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author | Josh Blum <josh@joshknows.com> | 2010-11-23 15:35:48 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-11-23 15:35:48 -0800 |
commit | f56c1247cbe7b7e90acee2711b5dda3356b9486a (patch) | |
tree | 81dadc83537c2c50550cd94e224571e472176c6f /fpga/usrp2/control_lib/newfifo/packet32_tb.v | |
parent | 9f94ef843ceca63bcb83b2d473cbba709c9110b6 (diff) | |
parent | eb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 (diff) | |
download | uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.tar.gz uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.tar.bz2 uhd-f56c1247cbe7b7e90acee2711b5dda3356b9486a.zip |
Merge branch 'next' of ettus.sourcerepo.com:ettus/uhdpriv into next
Diffstat (limited to 'fpga/usrp2/control_lib/newfifo/packet32_tb.v')
-rw-r--r-- | fpga/usrp2/control_lib/newfifo/packet32_tb.v | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/fpga/usrp2/control_lib/newfifo/packet32_tb.v b/fpga/usrp2/control_lib/newfifo/packet32_tb.v new file mode 100644 index 000000000..82bb09c29 --- /dev/null +++ b/fpga/usrp2/control_lib/newfifo/packet32_tb.v @@ -0,0 +1,27 @@ + + +module packet32_tb(); + + wire [35:0] data; + wire src_rdy, dst_rdy; + + wire clear = 0; + reg clk = 0; + reg reset = 1; + + always #10 clk <= ~clk; + initial #1000 reset <= 0; + + initial $dumpfile("packet32_tb.vcd"); + initial $dumpvars(0,packet32_tb); + + wire [31:0] total, crc_err, seq_err, len_err; + + packet_generator32 pkt_gen (.clk(clk), .reset(reset), .clear(clear), + .data_o(data), .src_rdy_o(src_rdy), .dst_rdy_i(dst_rdy)); + + packet_verifier32 pkt_ver (.clk(clk), .reset(reset), .clear(clear), + .data_i(data), .src_rdy_i(src_rdy), .dst_rdy_o(dst_rdy), + .total(total), .crc_err(crc_err), .seq_err(seq_err), .len_err(len_err)); + +endmodule // packet32_tb |