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authorJosh Blum <josh@joshknows.com>2010-04-16 09:42:46 +0000
committerJosh Blum <josh@joshknows.com>2010-04-16 09:42:46 +0000
commit835cb56ef820a69e1e6e0ccde7c5a0e78ca5ad25 (patch)
tree4fe48bdaf92311deedfbe1a5e77dd209468a2d7d /fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v
parentf1838b9284a124fcfb5996eaf1647a69b4473278 (diff)
parent067491b58676cbdaa754334949a8ffc2daf32979 (diff)
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Merge branch 'master' of git@ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
Conflicts: .gitignore
Diffstat (limited to 'fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v')
-rw-r--r--fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v13
1 files changed, 13 insertions, 0 deletions
diff --git a/fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v b/fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v
new file mode 100644
index 000000000..39ada9a4f
--- /dev/null
+++ b/fpga/usrp2/control_lib/newfifo/ll8_shortfifo.v
@@ -0,0 +1,13 @@
+
+
+module ll8_shortfifo
+ (input clk, input reset, input clear,
+ input [7:0] datain, input sof_i, input eof_i, input error_i, input src_rdy_i, output dst_rdy_o,
+ output [7:0] dataout, output sof_o, output eof_o, output error_o, output src_rdy_o, input dst_rdy_i);
+
+ fifo_short #(.WIDTH(11)) fifo_short
+ (.clk(clk), .reset(reset), .clear(clear),
+ .datain({error_i,eof_i,sof_i,datain}), .src_rdy_i(src_rdy_i), .dst_rdy_o(dst_rdy_o),
+ .dataout({error_o,eof_o,sof_o,dataout}), .src_rdy_o(src_rdy_o), .dst_rdy_i(dst_rdy_i));
+
+endmodule // ll8_shortfifo