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| author | Steve Czabaniuk <steve.czabaniuk@ni.com> | 2020-06-19 09:10:25 -0500 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-06-22 14:32:42 -0500 |
| commit | 1d71d453de8991d9121f7ad07c10a2c186b6d03e (patch) | |
| tree | 7065639ad13165be1551a01e1f764a01af34aaff /fpga/usrp1/sdr_lib/hb/hbd_tb | |
| parent | 05137529261bf9eae2a8b72cdf67e86a8ff96927 (diff) | |
| download | uhd-1d71d453de8991d9121f7ad07c10a2c186b6d03e.tar.gz uhd-1d71d453de8991d9121f7ad07c10a2c186b6d03e.tar.bz2 uhd-1d71d453de8991d9121f7ad07c10a2c186b6d03e.zip | |
multi_usrp: Assert that edge_lists are non-empty before accessing
The edge_list for a given rx/tx chain should never be empty so this
explicitly performs that check, which prevents a potential bad access.
Diffstat (limited to 'fpga/usrp1/sdr_lib/hb/hbd_tb')
0 files changed, 0 insertions, 0 deletions