diff options
author | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:41 -0700 |
---|---|---|
committer | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:41 -0700 |
commit | 3a196c5d614fbec9b1010b3082245614ba5e0dc9 (patch) | |
tree | 784f075298f5d86c9e7429ce0ff977deaf4315c8 /fpga/usrp1/models/fifo_4k_18.v | |
parent | cbf7a0916f0455743d8446a8edc0f0775e3e63ed (diff) | |
parent | 05d77f772317de5d925301aa11bb9a880656dd05 (diff) | |
download | uhd-3a196c5d614fbec9b1010b3082245614ba5e0dc9.tar.gz uhd-3a196c5d614fbec9b1010b3082245614ba5e0dc9.tar.bz2 uhd-3a196c5d614fbec9b1010b3082245614ba5e0dc9.zip |
Merge branch 'udp'
Diffstat (limited to 'fpga/usrp1/models/fifo_4k_18.v')
-rw-r--r-- | fpga/usrp1/models/fifo_4k_18.v | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/fpga/usrp1/models/fifo_4k_18.v b/fpga/usrp1/models/fifo_4k_18.v new file mode 100644 index 000000000..3efbf74f0 --- /dev/null +++ b/fpga/usrp1/models/fifo_4k_18.v @@ -0,0 +1,26 @@ + + +module fifo_4k_18 + (input [17:0] data, + input wrreq, + input wrclk, + output wrfull, + output wrempty, + output [11:0] wrusedw, + + output [17:0] q, + input rdreq, + input rdclk, + output rdfull, + output rdempty, + output [11:0] rdusedw, + + input aclr ); + +fifo #(.width(18),.depth(4096),.addr_bits(12)) fifo_4k + ( data, wrreq, rdreq, rdclk, wrclk, aclr, q, + rdfull, rdempty, rdusedw, wrfull, wrempty, wrusedw); + +endmodule // fifo_4k_18 + + |