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author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
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committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 11:25:20 +0200 |
commit | fd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch) | |
tree | 3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp1/megacells/fifo_1kx16.inc | |
parent | 3b66804e41891e358c790b453a7a59ec7462dba4 (diff) | |
download | uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.bz2 uhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.zip |
Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp1/megacells/fifo_1kx16.inc')
-rwxr-xr-x | fpga/usrp1/megacells/fifo_1kx16.inc | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/fpga/usrp1/megacells/fifo_1kx16.inc b/fpga/usrp1/megacells/fifo_1kx16.inc deleted file mode 100755 index 0b70afe62..000000000 --- a/fpga/usrp1/megacells/fifo_1kx16.inc +++ /dev/null @@ -1,31 +0,0 @@ ---Copyright (C) 1991-2006 Altera Corporation
---Your use of Altera Corporation's design tools, logic functions
---and other software and tools, and its AMPP partner logic
---functions, and any output files any of the foregoing
---(including device programming or simulation files), and any
---associated documentation or information are expressly subject
---to the terms and conditions of the Altera Program License
---Subscription Agreement, Altera MegaCore Function License
---Agreement, or other applicable license agreement, including,
---without limitation, that your use is for the sole purpose of
---programming logic devices manufactured by Altera and sold by
---Altera or its authorized distributors. Please refer to the
---applicable agreement for further details.
-
-
-FUNCTION fifo_1kx16
-(
- aclr,
- clock,
- data[15..0],
- rdreq,
- wrreq
-)
-
-RETURNS (
- almost_empty,
- empty,
- full,
- q[15..0],
- usedw[9..0]
-);
|